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[209.132.180.67]) by mx.google.com with ESMTP id m5si3312916pli.463.2017.12.14.07.34.26; Thu, 14 Dec 2017 07:34:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z1XEk+5P; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753499AbdLNPeY (ORCPT + 19 others); Thu, 14 Dec 2017 10:34:24 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:37710 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753264AbdLNPeR (ORCPT ); Thu, 14 Dec 2017 10:34:17 -0500 Received: by mail-pg0-f66.google.com with SMTP id y6so3631299pgp.4 for ; Thu, 14 Dec 2017 07:34:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=n4ehJD1+yKwW2AxoOUVUm5GlfZ51/lPswpnsFynL80s=; b=Z1XEk+5Pu1CKWrec6nOcOvZDgoLPqzwQI+OU+S4VTF7r1w7gijlEOtgDyrhpOKCjW6 TFwlF/um/MtwOr3AGE+i45rzm1Wi/9SRGd2Jy/CqBVWlpX56U723dGy5A4rlsZOsEl3v EqVwYWR9JiLsQyZJk9rtvScqvdV1OnxbFsOoc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=n4ehJD1+yKwW2AxoOUVUm5GlfZ51/lPswpnsFynL80s=; b=tOrC/G0lSf7WFkQcc2vPwswvGMvckN7Eh+HM+CgA53YK2bZdVcLEEBjjtnSFNUBkwh DEMIWv3++zmwDGKCtZizEKltJwPE6gfZNe2NqDwGjFATz/X9O0dm9Rgwq6kMTEi/j2eM 7yGJtSq+g3pevzC1nio3ikpyYGjg33B2TcH+cClJGMeYnjDa7/+Tl8t1QkVms3GzLT8u hrhGx3+OeszMBif23xEUVipuJrSBfG0uWWPmy3F8G42iKdCuPUII4+HoMWvGeLdRV6vC TunowU0YV4ogIKpTiseVrkfGlyngHl9LZ0o34RUqYI3oQxnRCy4p064Ejwzwa+6TMOmC uh3w== X-Gm-Message-State: AKGB3mKc3xkWIfeLrzyfSgBGYeKv5IEHlWN/utZkTszvCzu/ph3kS6F1 pAMQkX52W8Nd+UnM2SBM2j+Kc7fhebg= X-Received: by 10.84.234.135 with SMTP id n7mr9478922plk.298.1513265656723; Thu, 14 Dec 2017 07:34:16 -0800 (PST) Received: from localhost ([122.172.99.7]) by smtp.gmail.com with ESMTPSA id d66sm7975852pgc.67.2017.12.14.07.34.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Dec 2017 07:34:16 -0800 (PST) From: Viresh Kumar To: Greg Kroah-Hartman Cc: Viresh Kumar , Vincent Guittot , Stephen Boyd , Rajendra Nayak , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robdclark@gmail.com, s.hauer@pengutronix.de, l.stach@pengutronix.de, shawnguo@kernel.org, fabio.estevam@nxp.com, nm@ti.com, xuwei5@hisilicon.com, robh+dt@kernel.org Subject: [PATCH V5 09/13] boot_constraint: Add support for Hisilicon platforms Date: Thu, 14 Dec 2017 21:03:16 +0530 Message-Id: <7173cc03ee1ec160f6c0b4734dfdfcd4508ea9ff.1513264961.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds boot constraint support for Hisilicon platforms. Currently only one use case is supported: earlycon. One of the UART is enabled by the bootloader and is used for early console in the kernel. The boot constraint core handles it properly and removes constraints once the serial device is probed by its driver. This is tested on hi6220-hikey 96board. Signed-off-by: Viresh Kumar --- arch/arm64/Kconfig.platforms | 1 + drivers/boot_constraint/Makefile | 2 + drivers/boot_constraint/hikey.c | 158 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 161 insertions(+) create mode 100644 drivers/boot_constraint/hikey.c -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 2401373565ff..a586ed728393 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -87,6 +87,7 @@ config ARCH_HISI select ARM_TIMER_SP804 select HISILICON_IRQ_MBIGEN if PCI select PINCTRL + select DEV_BOOT_CONSTRAINT help This enables support for Hisilicon ARMv8 SoC family diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile index a765094623a3..5609280162c4 100644 --- a/drivers/boot_constraint/Makefile +++ b/drivers/boot_constraint/Makefile @@ -1,3 +1,5 @@ # Makefile for device boot constraints obj-y := clk.o deferrable_dev.o core.o pm.o supply.o + +obj-$(CONFIG_ARCH_HISI) += hikey.o diff --git a/drivers/boot_constraint/hikey.c b/drivers/boot_constraint/hikey.c new file mode 100644 index 000000000000..25acb4070569 --- /dev/null +++ b/drivers/boot_constraint/hikey.c @@ -0,0 +1,158 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * This takes care of Hisilicon boot time device constraints, normally set by + * the Bootloader. + * + * Copyright (C) 2017 Linaro. + * Viresh Kumar + */ + +#include +#include +#include +#include + +static bool earlycon_boot_constraints_enabled __initdata; + +static int __init enable_earlycon_boot_constraints(char *str) +{ + earlycon_boot_constraints_enabled = true; + + return 0; +} + +__setup_param("earlycon", boot_constraint_earlycon, + enable_earlycon_boot_constraints, 0); +__setup_param("earlyprintk", boot_constraint_earlyprintk, + enable_earlycon_boot_constraints, 0); + + +struct hikey_machine_constraints { + struct dev_boot_constraint_of *dev_constraints; + unsigned int count; +}; + +static struct dev_boot_constraint_clk_info uart_iclk_info = { + .name = "uartclk", +}; + +static struct dev_boot_constraint_clk_info uart_pclk_info = { + .name = "apb_pclk", +}; + +static struct dev_boot_constraint hikey3660_uart_constraints[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_iclk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_pclk_info, + }, +}; + +static const char * const uarts_hikey3660[] = { + "serial@fff32000", /* UART 6 */ +}; + +static struct dev_boot_constraint_of hikey3660_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3660_uart_constraints, + .count = ARRAY_SIZE(hikey3660_uart_constraints), + + .dev_names = uarts_hikey3660, + .dev_names_count = ARRAY_SIZE(uarts_hikey3660), + }, +}; + +static struct hikey_machine_constraints hikey3660_constraints = { + .dev_constraints = hikey3660_dev_constraints, + .count = ARRAY_SIZE(hikey3660_dev_constraints), +}; + +static const char * const uarts_hikey6220[] = { + "uart@f7113000", /* UART 3 */ +}; + +static struct dev_boot_constraint_of hikey6220_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3660_uart_constraints, + .count = ARRAY_SIZE(hikey3660_uart_constraints), + + .dev_names = uarts_hikey6220, + .dev_names_count = ARRAY_SIZE(uarts_hikey6220), + }, +}; + +static struct hikey_machine_constraints hikey6220_constraints = { + .dev_constraints = hikey6220_dev_constraints, + .count = ARRAY_SIZE(hikey6220_dev_constraints), +}; + +static struct dev_boot_constraint hikey3798cv200_uart_constraints[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_pclk_info, + }, +}; + +static const char * const uarts_hikey3798cv200[] = { + "serial@8b00000", /* UART 0 */ +}; + +static struct dev_boot_constraint_of hikey3798cv200_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3798cv200_uart_constraints, + .count = ARRAY_SIZE(hikey3798cv200_uart_constraints), + + .dev_names = uarts_hikey3798cv200, + .dev_names_count = ARRAY_SIZE(uarts_hikey3798cv200), + }, +}; + +static struct hikey_machine_constraints hikey3798cv200_constraints = { + .dev_constraints = hikey3798cv200_dev_constraints, + .count = ARRAY_SIZE(hikey3798cv200_dev_constraints), +}; + +static const struct of_device_id machines[] __initconst = { + { .compatible = "hisilicon,hi3660", .data = &hikey3660_constraints }, + { .compatible = "hisilicon,hi3798cv200", .data = &hikey3798cv200_constraints }, + { .compatible = "hisilicon,hi6220", .data = &hikey6220_constraints }, + { } +}; + +static int __init hikey_constraints_init(void) +{ + const struct hikey_machine_constraints *constraints; + const struct of_device_id *match; + struct device_node *np; + + if (!earlycon_boot_constraints_enabled) + return 0; + + np = of_find_node_by_path("/"); + if (!np) + return -ENODEV; + + match = of_match_node(machines, np); + of_node_put(np); + + if (!match) + return 0; + + constraints = match->data; + + dev_boot_constraint_add_deferrable_of(constraints->dev_constraints, + constraints->count); + + return 0; +} + +/* + * The amba-pl011 driver registers itself from arch_initcall level. Setup the + * serial boot constraints before that in order not to miss any boot messages. + */ +postcore_initcall_sync(hikey_constraints_init);