From patchwork Thu Nov 13 11:27:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 40742 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wg0-f71.google.com (mail-wg0-f71.google.com [74.125.82.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0D8F124493 for ; Thu, 13 Nov 2014 11:27:58 +0000 (UTC) Received: by mail-wg0-f71.google.com with SMTP id b13sf7711758wgh.10 for ; Thu, 13 Nov 2014 03:27:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:message-id:date:from:user-agent :mime-version:to:cc:subject:references:in-reply-to:sender:precedence :list-id:x-original-sender:x-original-authentication-results :mailing-list:list-post:list-help:list-archive:list-unsubscribe :content-type:content-transfer-encoding; bh=3qaJEDD9Eb9on42f3/xJetS+FKDrVCN2TUaLGE9YT8o=; b=bF5Hm+EBLrnShhulESQ8aU7qqeb1ufQqK/xqmP5aSuZgKKcL7Hh1U2SrjLph+8lXXK XYPcnuszn/CS//P1wkAr9jb/yTz8DWkjjUxJUBElfD8/SPYl6Sm21KxtwtTg299qGc8t Vm3iv2bMOgVOnASkEJ/PNsxfIZp5VkEuZkTNQwPGzkYNp4kd2NkcTAzyWxfz/5bIwP+Z PBi4hj+WnDMSxciX80A/hGyl6M2DvXkd3bf/8W0MQavmOhd8mowwqwZ45N2wjTWHjZDh SGEyjdPSEyJNreW0HiNZWDY6EvfvrTE0yKVsaE6SsUF2Blf/xu3hfbiXawu+gXUm2jkF Q3Xg== X-Gm-Message-State: ALoCoQlRsdJjm/sM91wP2ROyD4ge2wi2cu20RGwwzb6GNVrbqFv630u8ZI710XpziywMT1HEuI++ X-Received: by 10.180.76.168 with SMTP id l8mr4715426wiw.1.1415878074717; Thu, 13 Nov 2014 03:27:54 -0800 (PST) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.5.166 with SMTP id t6ls900332lat.20.gmail; Thu, 13 Nov 2014 03:27:54 -0800 (PST) X-Received: by 10.112.173.100 with SMTP id bj4mr1879674lbc.78.1415878074492; Thu, 13 Nov 2014 03:27:54 -0800 (PST) Received: from mail-la0-f53.google.com (mail-la0-f53.google.com. [209.85.215.53]) by mx.google.com with ESMTPS id u4si14211019lae.31.2014.11.13.03.27.54 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 13 Nov 2014 03:27:54 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) client-ip=209.85.215.53; Received: by mail-la0-f53.google.com with SMTP id mc6so12857726lab.26 for ; Thu, 13 Nov 2014 03:27:54 -0800 (PST) X-Received: by 10.112.14.69 with SMTP id n5mr1890746lbc.34.1415878074380; Thu, 13 Nov 2014 03:27:54 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.184.201 with SMTP id ew9csp573620lbc; Thu, 13 Nov 2014 03:27:53 -0800 (PST) X-Received: by 10.70.87.144 with SMTP id ay16mr1859965pdb.85.1415878072675; Thu, 13 Nov 2014 03:27:52 -0800 (PST) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z5si20427339pdf.33.2014.11.13.03.27.51 for ; Thu, 13 Nov 2014 03:27:52 -0800 (PST) Received-SPF: none (google.com: linux-acpi-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932658AbaKML1u (ORCPT + 5 others); Thu, 13 Nov 2014 06:27:50 -0500 Received: from service87.mimecast.com ([91.220.42.44]:39674 "EHLO service87.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932650AbaKML1t convert rfc822-to-8bit (ORCPT ); Thu, 13 Nov 2014 06:27:49 -0500 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 13 Nov 2014 11:27:43 +0000 Received: from [10.1.209.143] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 13 Nov 2014 11:27:40 +0000 Message-ID: <546495AB.9050308@arm.com> Date: Thu, 13 Nov 2014 11:27:39 +0000 From: Marc Zyngier User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130330 Thunderbird/17.0.5 MIME-Version: 1.0 To: Thomas Gleixner CC: Jiang Liu , Bjorn Helgaas , Benjamin Herrenschmidt , Ingo Molnar , "H. Peter Anvin" , "Rafael J. Wysocki" , Randy Dunlap , Yinghai Lu , Borislav Petkov , "grant.likely@linaro.org" , Yingjoe Chen , Matthias Brugger , Konrad Rzeszutek Wilk , Andrew Morton , Tony Luck , Joerg Roedel , Greg Kroah-Hartman , Yijing Wang , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-acpi@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [RFC Part4 v1 00/17] Refine support of non-PCI-compliant Message References: <1415545839-28263-1-git-send-email-jiang.liu@linux.intel.com> <546364FA.7010806@arm.com> In-Reply-To: X-Enigmail-Version: 1.4.6 X-OriginalArrivalTime: 13 Nov 2014 11:27:40.0827 (UTC) FILETIME=[D5DA4EB0:01CFFF34] X-MC-Unique: 114111311274300201 Sender: linux-acpi-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: marc.zyngier@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Hi Thomas, On 12/11/14 14:46, Thomas Gleixner wrote: > On Wed, 12 Nov 2014, Marc Zyngier wrote: >> This patch introduces two optionnal fields to the msi_chip structure: >> - a pointer to an irq domain, describing the MSI domain associated >> with this msi_chip. To be populated with msi_create_irq_domain. >> - a domain_alloc_irqs() callback that has the same purpose as >> arch_setup_msi_irqs(), with the above domain as an additional >> parameter. >> >> If both of these fields are non-NULL, then domain_alloc_irqs() is >> called, bypassing the setup_irq callback. This allows the MSI driver >> to use the domain stacking feature without mandating core support in >> the architecture. > > I'd rather have the callback in the irqdomain itself. Along with a > callback to free the interrupts. > > AFAICT is msi_chip more or less a wrapper around the actual MSI irq > domain. So we rather move towards assigning irqdomain to the pci bus > and get rid of msi_chip instead of adding another level of obscure > indirection through msi_chip. I can see that putting the irq domain at the bus level makes a lot of sense (assuming nobody tries to have multiple MSI controllers per bus...). So I'm starting with something like this: How do you see this behaving? At the moment, I have the "prepare" callback directly calling into pci_msi_domain_alloc_irqs() so that the irqs get created, but I have the nagging feeling that it's not what you want... ;-) The main issue I can see is that if more than one domain in the stack implements that, who gets to call pci_msi_domain_alloc_irqs? If we try to decouple those two, there is a problem with the creation of the intermediate structure (the irq_alloc_info that's in Jiang's patches), as this is a arch/driver/whatever specific structure. For reference, I've pushed out my current branch (very much a work in progress): http://git.kernel.org/cgit/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/branch-from-hell The commits related to this discussion are: http://git.kernel.org/cgit/linux/kernel/git/maz/arm-platforms.git/commit/?h=irq/branch-from-hell&id=56ea48e6389fe461cb3ddf01e19afcdcd8f12f66 and http://git.kernel.org/cgit/linux/kernel/git/maz/arm-platforms.git/commit/?h=irq/branch-from-hell&id=855ab8b937967854dd070de2d0aaa07639e19526 as well as the code making use of that: http://git.kernel.org/cgit/linux/kernel/git/maz/arm-platforms.git/tree/drivers/irqchip/irq-gic-v3-its.c?h=irq/branch-from-hell&id=9f8ed988c2411831b7512006642e484c151e9a7a#n1184 Thanks, M. diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 640a1ec..07e50fc 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -41,6 +41,7 @@ struct irq_domain; struct of_device_id; struct irq_chip; struct irq_data; +struct device; /* Number of irqs reserved for a legacy isa controller */ #define NUM_ISA_INTERRUPTS 16 @@ -76,6 +77,10 @@ struct irq_domain_ops { unsigned int nr_irqs); void (*activate)(struct irq_domain *d, struct irq_data *irq_data); void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data); + int (*prepare_alloc_irqs)(struct irq_domain *d, struct device *dev, + unsigned int nr_irqs, int type); + int (*cleanup_free_irqs)(struct irq_domain *d, struct device *dev, + unsigned int virq, unsigned int nr_irqs); #endif };