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Wed, 11 Dec 2019 14:52:03 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20191211145203eusmtrp2e34c38f422a444028fab665fdba7fe16~fWLPJR_qW0452204522eusmtrp2h; Wed, 11 Dec 2019 14:52:03 +0000 (GMT) X-AuditID: cbfec7f5-a0fff7000001ed1a-76-5df102949857 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 67.6B.07950.39201FD5; Wed, 11 Dec 2019 14:52:03 +0000 (GMT) Received: from AMDC2765.digital.local (unknown [106.120.51.73]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20191211145202eusmtip2fcc25505ece3a2c913bad879caf94a57~fWLOW-cWL1112911129eusmtip2C; Wed, 11 Dec 2019 14:52:02 +0000 (GMT) From: Marek Szyprowski To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Marek Szyprowski , Greg Kroah-Hartman , Krzysztof Kozlowski , Matthias Brugger , Maxime Ripard , Chen-Yu Tsai , Andy Gross , Bjorn Andersson , Stefan Agner , Chunfeng Yun , Linus Walleij , Bartlomiej Zolnierkiewicz Subject: [PATCH v2 1/4] ARM: dts: exynos: Correct USB3503 GPIOs polarity Date: Wed, 11 Dec 2019 15:51:55 +0100 Message-Id: <20191211145155.24927-1-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211145054.24835-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0iTURjufHdnk2/T8GCSMcgwUpNJnbKsQOgjgvJPPwTTpZ+3vLE5rQiq aVajwsTI7KKpaXjZ5hRNsy01WiY4dbYknVZmUKBhWrayy7Yv699ze8/z8nIYXGohA5j07Dxe ma3IlFEiov2p0xpahs3Hb3k9TqLB6R8EainXk2jAPEeg86bbBCqs0VPIajXQqGy5HkPGaTuJ bF23KGQrHAao3GrCUHXdORw1P3HQSFMkR8UX60jUqjtPI2evFdsj4WqWJnHO8LaR5DorHDRn bLhIcRP2booz326iudba01xRv5ngrrQ1AG7BuO6QKE60M5nPTM/nleHRiaI0Te0EyNVJjp8t GcXOgCEfLfBiIBsJTd8/01ogYqTsfQCn9AOU25CyiwDeHP9rLAD46J4GX5lYqNRQglEP4ILe QQrENfFspIZ2pyg2AmpntZ6UH9sE4I/L5YSb4Ox3HLbb6z0lviwHTYZq0o0JdgPsrOzwYDG7 Cy46qwihLwg2Gh57ur3YaKj9qvM8BNlXNJxZ+k0JoRg42TOPCdgXfrS00QIOhL87KzFhoBDA N4PNtEAuAWjTlAMhFQX7LMOuasa1XwjUd4UL8l5omXJibhmyPnBsVuKWcRcsbb+OC7IYXiiW CulgWGHR/avtGRr5ey8ONnTZMOFEVwGcsxqwEhBU8b+sCoAG4M+rVVmpvEqezReEqRRZKnV2 alhSTpYRuL7XwC/LlwfAtHy0F7AMkK0WV3V8ipeSinzViaxeABlc5ie2FM/FS8XJihMneWVO glKdyat6wVqGkPmL5dUf4qVsqiKPP8bzubxyxcUYr4AzQLJjnEl0ej/vXHOn6IB3c8f6Zcsq 5e6S2Ljlh+/GWnyT3qkT8OmZ6MCM2bAqTXCGdWvs5/3myJf7OiZjxiTeR/p1b7r7btR+m31h /xml7u/ODx8dKZ7ZcO29Dt8ecislZaNj87ZVxKlQntg+L74bc+lgs/pwW0FaaXCQ3GgfiygE MkKVpojYhCtVij+GKxDEWgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsVy+t/xe7qTmT7GGqy9rm9x7vFvFouNM9az Wpze/47Fon3fXBaL5sXr2SzOn9/AbjHlz3Imi02Pr7FaXN41h83icvNFRosZ5/cxWSxa1sps sfbIXXaLphZji7bOZawWm9e1s1v8PHSeyUHQY/H3e8weGx6tZvXYOesuu8emVZ1sHneu7WHz 2D93DbvH5iX1Hi0n97N49G1ZxejxeZNcAFeUnk1RfmlJqkJGfnGJrVK0oYWRnqGlhZ6RiaWe obF5rJWRqZK+nU1Kak5mWWqRvl2CXkbTkjuMBesEKxonXGFqYLzA18XIySEhYCLxeX4TG4gt JLCUUeL2RVWIuIzEyWkNrBC2sMSfa11ANVxANZ8YJf7fP8cEkmATMJToeguREBHYwChx5v0T FhCHWaCJRWLqrMdgVcICHhL7NiwCG8UioCqxc/52MJtXwFbiy88FLBAr5CVWbzjADGJzCthJ dH1bxwJxkq3Ep9ttbBMY+RYwMqxiFEktLc5Nzy020itOzC0uzUvXS87P3cQIjKRtx35u2cHY 9S74EKMAB6MSD++C7e9jhVgTy4orcw8xSnAwK4nwHm97FyvEm5JYWZValB9fVJqTWnyI0RTo qInMUqLJ+cAozyuJNzQ1NLewNDQ3Njc2s1AS5+0QOBgjJJCeWJKanZpakFoE08fEwSnVwLjA x0pO3KBY64Kd3eJjgXYPNlb/+lwtGfGs3jjv2ZbjK/g51ziudfayO/kyfcbUp4Ivnq1vUtnQ znQwOcs8sEfabt6HZOdKz4iadKZtEzIPNZx952bUfdavLmbnkXPfjj6L9/l/vPJV7P67nK45 m9pPfVh86VafpnfN6beO6mlKy1U3uCTovFZiKc5INNRiLipOBADiH/wougIAAA== X-CMS-MailID: 20191211145203eucas1p2aa9445d7b778451ff1da0e552ccdae18 X-Msg-Generator: CA X-RootMTR: 20191211145203eucas1p2aa9445d7b778451ff1da0e552ccdae18 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20191211145203eucas1p2aa9445d7b778451ff1da0e552ccdae18 References: <20191211145054.24835-1-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Current USB3503 driver ignores GPIO polarity and always operates as if the GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing USB3503 chip applications to match the chip specification and common convention for naming the pins. The only pin, which has to be ACTIVE_LOW is the reset pin. The remaining are ACTIVE_HIGH. This change allows later to fix the USB3503 driver to properly use generic GPIO bindings and read polarity from DT. Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 2 +- arch/arm/boot/dts/exynos5250-arndale.dts | 2 +- arch/arm/boot/dts/exynos5410-odroidxu.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index ea55f377d17c..9c39e82e4ecb 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -267,7 +267,7 @@ intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>; connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; initial-mode = <1>; }; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index d6c85efdb465..3eddf5dbcf7b 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -154,7 +154,7 @@ compatible = "smsc,usb3503a"; reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; - connect-gpios = <&gpd1 7 GPIO_ACTIVE_LOW>; + connect-gpios = <&gpd1 7 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts index e0db251e253f..4f9297ae0763 100644 --- a/arch/arm/boot/dts/exynos5410-odroidxu.dts +++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts @@ -170,7 +170,7 @@ intn-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>; connect-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpx1 4 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpx1 4 GPIO_ACTIVE_LOW>; initial-mode = <1>; clock-names = "refclk";