From patchwork Mon Dec 9 20:10:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 181092 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp4830535ile; Mon, 9 Dec 2019 12:12:56 -0800 (PST) X-Google-Smtp-Source: APXvYqxFtS/6lcCEb1q5QfEcpou6Zsyu0cVIFdEoKsk+Y47TXLqfdLkshDdT9UPdDZkiHIit77Ym X-Received: by 2002:a9d:464:: with SMTP id 91mr24067896otc.255.1575922376166; Mon, 09 Dec 2019 12:12:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575922376; cv=none; d=google.com; s=arc-20160816; b=rrU39Y7oPdTjiYqicoLnwB7Fclm3UffhrPa9jgEpwGxBWenSAqEDhtWdPSnJ00wz0e voknCZhHmklAdW5EpZsJ4XGIbPuSJvDpxtuObs7UkwTKIPpCu+D4MWSOT9Na7EzMBXe9 OCny4+mxvGMerb4M52RlMCqXYkVUsFn/uH2MF4NTGZR0QesFKo+2yVM6YITMcFI/Vpb6 wyJZO+f5Yic4vvAd3KkdLL5vaRlW6I+3xncKTA3ueYmucChpsgaeoYuYX0kH4c9A8hsz mBpIikX6WHdjOCAf1m/tz80SPlK9bnFBayr25u89c3WCBRdH9uY+59Qp53TndvNiGVr5 y6+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6vGHJhYH4z/ijV+8X0E6eHdnbtT9ZGzqFX7An5fC93k=; b=SmUl+qoDeiL+W4/KsFMcnz6FLyLg+hA2R0au9Olk8GOxlr4LePRHgdAwEvtnReegrr PpGMVKO5h8ErLy8QSTqFL8v3IuFXkXQoXgDeCj1sIG1KRICr1zZdeLfoh7emOt3k4gwC CjayR9/NtgLwSI4SRaod8Qilztqs2bQbZhx8lOkPG+5pQv001ae2DemG+wlDQY/MdLX6 lkkLytHQk9OqYw0xk5qKxnYb+kPNcJnFPyTRCIcEaC8/JSsHu4KPXwm3PMNDnjJ6WnJW mMg0cnvZugyplBpwuqvL/yoankWx2XxVAe6WRC10m1SSC/zZ3WgiZLWAaqe53rpH/TBA 4Ldg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NxVpNJQP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y8si585536oih.141.2019.12.09.12.12.55; Mon, 09 Dec 2019 12:12:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NxVpNJQP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726908AbfLIUMy (ORCPT + 27 others); Mon, 9 Dec 2019 15:12:54 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:58064 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726230AbfLIUMj (ORCPT ); Mon, 9 Dec 2019 15:12:39 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xB9KCYeD127572; Mon, 9 Dec 2019 14:12:34 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1575922354; bh=6vGHJhYH4z/ijV+8X0E6eHdnbtT9ZGzqFX7An5fC93k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NxVpNJQP1YbKBroSf/JmiZql4K904CsBfjLy321EVRH/UZ+0M6Mab5sCzRbdW6INP F9R7YhFMto7AmZWfn41Wn1EZVmAq+YBJz3Qeu7VzkSQMGot7gp/majOxNwRphVmEj8 ix5jAQWpHXt3o0EtRv7IRx9Uql1Uq7OzoTlgx3JU= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xB9KCY8a036582 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 9 Dec 2019 14:12:34 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Mon, 9 Dec 2019 14:12:34 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Mon, 9 Dec 2019 14:12:34 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id xB9KCYHs066381; Mon, 9 Dec 2019 14:12:34 -0600 From: Dan Murphy To: , , , CC: , , , , Dan Murphy , Rob Herring Subject: [PATCH net-next v3 1/2] dt-bindings: dp83867: Convert fifo-depth to common fifo-depth and make optional Date: Mon, 9 Dec 2019 14:10:24 -0600 Message-ID: <20191209201025.5757-2-dmurphy@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191209201025.5757-1-dmurphy@ti.com> References: <20191209201025.5757-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the ti,fifo-depth from a TI specific property to the common tx-fifo-depth property. Also add support for the rx-fifo-depth. These are optional properties for this device and if these are not available then the fifo depths are set to device default values. Signed-off-by: Dan Murphy Reported-by: Adrian Bunk CC: Rob Herring --- v3 - No changes v2 - Rebase on linux-net next as the patch would not apply Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) -- 2.23.0 diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 388ff48f53ae..44e2a4fab29e 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -8,8 +8,6 @@ Required properties: - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h for applicable values. Required only if interface type is PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID - - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h - for applicable values Note: If the interface type is PHY_INTERFACE_MODE_RGMII the TX/RX clock delays will be left at their default values, as set by the PHY's pin strapping. @@ -42,6 +40,14 @@ Optional property: Some MACs work with differential SGMII clock. See data manual for details. + - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h + for applicable values (deprecated) + + -tx-fifo-depth - As defined in the ethernet-controller.yaml. Values for + the depth can be found in dt-bindings/net/ti-dp83867.h + -rx-fifo-depth - As defined in the ethernet-controller.yaml. Values for + the depth can be found in dt-bindings/net/ti-dp83867.h + Note: ti,min-output-impedance and ti,max-output-impedance are mutually exclusive. When both properties are present ti,max-output-impedance takes precedence. @@ -55,7 +61,7 @@ Example: reg = <0>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; - ti,fifo-depth = ; + tx-fifo-depth = ; }; Datasheet can be found: