From patchwork Mon Dec 2 18:21:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180637 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp346959ile; Mon, 2 Dec 2019 10:23:03 -0800 (PST) X-Google-Smtp-Source: APXvYqz6W/2nAsLTxHEJkjPHzk+1iiQaR6ZGjLFIP9oVWdIlNHuOK++Uk/5P20oJ19T3evlZ6A3m X-Received: by 2002:a17:906:c299:: with SMTP id r25mr570598ejz.272.1575310983360; Mon, 02 Dec 2019 10:23:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575310983; cv=none; d=google.com; s=arc-20160816; b=q7gl4DcMmuQqdWI1i+QzjabPSnY5DaskZUMVUhu3MoyYdhqbpoY4WQtrY28QIHLKoF o+i5crJcnKddDxh8kmgQcQBbwddl+r9fVTAt8xnIot5t6Sr5sIfwfNkMI1X8QPyCL5w4 2r7NWYyQN3UZtkHAalBZUsXDu2eStpNtCPMC7sNJGKl2lXNyDlRs91y5Scky4FyUxjIJ Wsz5Fxplygmxd5LlXBHHDO0T/vnt5wf+Bsp3NCrwIIWe3PTp+izL50sx+4uIj44G/hxq inPb/mAdkz2OAiQDRgyPv7kSENGRUHDjWm/UdfDL5aHO1vHIg+gIyabWpu8McEFQ+MJ5 HIvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=MeCnNkreND1A/PIF/6x996XOvKtL/ccWe4jbECcBvvM=; b=TVKMZYJv6UGp2ngsco5Ggst5A7Pb5ZmLXeEltbgkGlRQT5GIQZ/3ATY0En2+aDXTL8 IEHNwjVhp+jNajlhS7bPEKYfIrl6vnxYIche+RAnLjUprht+mJm6AExn+DYJK4wd3A4S Atl/Tg9X2NnIEjnpob7h806ThEIb/zlLXNg7YQlYRVJWiPaVItxQ9Cw84LtOuD941uYb qnfK7PXyrXJj18qJ08aFSiwQ235yjugUXsRjC1+99futOIRdF1sJ37fE8TjXdqfXmVW3 Kt+tKzDNP+81TrdGFknu4vja5PxZ7/q5vpkVx7fj/nrv89v+j8v/5z1uXEHwZwV8DaBf W6Gw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id gz20si205852ejb.335.2019.12.02.10.23.03; Mon, 02 Dec 2019 10:23:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728089AbfLBSXA (ORCPT + 27 others); Mon, 2 Dec 2019 13:23:00 -0500 Received: from mx2.suse.de ([195.135.220.15]:35968 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727953AbfLBSWR (ORCPT ); Mon, 2 Dec 2019 13:22:17 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D5A72AEE1; Mon, 2 Dec 2019 18:22:16 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH 08/14] ARM: dts: rtd1195: Add UART resets Date: Mon, 2 Dec 2019 19:21:58 +0100 Message-Id: <20191202182205.14629-9-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191202182205.14629-1-afaerber@suse.de> References: <20191202182205.14629-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Associate the UART nodes with the corresponding reset controller bits. Signed-off-by: Andreas Färber --- v1: From RTD1195 v4 series arch/arm/boot/dts/rtd1195.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.16.4 diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index 886845e52205..09acb99083c1 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -8,6 +8,7 @@ /memreserve/ 0x17fff000 0x00001000; #include +#include / { compatible = "realtek,rtd1195"; @@ -179,6 +180,7 @@ reg = <0x800 0x400>; reg-shift = <2>; reg-io-width = <4>; + resets = <&iso_reset RTD1195_ISO_RSTN_UR0>; clock-frequency = <27000000>; status = "disabled"; }; @@ -190,6 +192,7 @@ reg = <0x200 0x100>; reg-shift = <2>; reg-io-width = <4>; + resets = <&reset2 RTD1195_RSTN_UR1>; clock-frequency = <27000000>; status = "disabled"; };