From patchwork Sat Nov 23 20:37:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180129 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128673ilf; Sat, 23 Nov 2019 12:38:32 -0800 (PST) X-Google-Smtp-Source: APXvYqzwSIkQIQcm1+0RjKG/vYEcEKAdw83OjBmDNcOP1EXeUewlTK9wOMaF+QawUqWT0HpefSN/ X-Received: by 2002:a05:6402:22a8:: with SMTP id cx8mr3532796edb.270.1574541512224; Sat, 23 Nov 2019 12:38:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574541512; cv=none; d=google.com; s=arc-20160816; b=hVC1sYrV1r7OQGTAqNVNpl9StS5C1WRyMlE72qq2vM/YNwWzbdSGIChNjJVCHsolWx 1Qh1Jy0CCyW9SH4K0KaljbewebLKjjJDkLAECQ5TnSWei7t1tNfEFgX4w7yWaTCjL3l+ DguDx95Ko6VZjxzsFoW7NEEKHzenfyuWXMM0L3XrK+0i8OxhMntRG56BDZ0lj9vWnQ2L fMvfAjWGFMJJtHd0ImHN3Efu9ECXbSuy84dz3cx3qcJ55kuwSiNNB0ep9XKNmNFEgzI7 WunB283sEUnPtrksEd3YfjiCmqUqnE4+yc60CvGeizaATXnpji+oR/iB4mdZWm7ne7RW rWpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=wj/eO5/gvi/aG7+Qf2LmIf8TRyQFouXfWrh6ebQmduc=; b=tKTMIxlw4agIwD/X+O0go5rUQrE4pYDGswOwfGmwm7uLqJ3TP49BMHHEDNmxfSOX/+ JC+FZwAI19+h234Nf/+IywXGulX8bQu+yXQV1QZqMjTA+avtwFfdyb+JSCNXHgvZ7fHd gAYRkTTjsvYeML19uF40r2Lcz/n2wfwxSuK4jrV82JP24lIMnqIGVRDw3MLhThus0cJT exi3YdDs0nZMi418yyCJAn1YtTlu31NJWYy9Xya+rmsGKgtzE1YKmkJfKpuXjpBBK1EZ V34PQfHmhAovqb8Lj+HrfWWNlULlkg5HhKq2EJJOI2SzGMVLcZijuIdDZSCQOC41t04B hpEA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b17si1610304edj.417.2019.11.23.12.38.32; Sat, 23 Nov 2019 12:38:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727073AbfKWUi0 (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:26 -0500 Received: from mx2.suse.de ([195.135.220.15]:34394 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726861AbfKWUiO (ORCPT ); Sat, 23 Nov 2019 15:38:14 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 84761B166; Sat, 23 Nov 2019 20:38:12 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Russell King Subject: [PATCH v4 8/8] ARM: realtek: Enable RTD1195 arch timer Date: Sat, 23 Nov 2019 21:37:59 +0100 Message-Id: <20191123203759.20708-9-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Without this magic write the timer doesn't work and boot gets stuck. Signed-off-by: Andreas Färber --- What is the name of the register 0xff018000? Is 0x1 a BIT(0) write, or how are the register bits defined? Is this a reset or a clock gate? How should we model it in DT? v3 -> v4: * Use writel_relaxed() instead of writel() v2 -> v3: Unchanged v2: New arch/arm/mach-realtek/rtd1195.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.16.4 diff --git a/arch/arm/mach-realtek/rtd1195.c b/arch/arm/mach-realtek/rtd1195.c index 0381a4447384..8d4de0c2308d 100644 --- a/arch/arm/mach-realtek/rtd1195.c +++ b/arch/arm/mach-realtek/rtd1195.c @@ -5,6 +5,9 @@ * Copyright (c) 2017-2019 Andreas Färber */ +#include +#include +#include #include #include @@ -27,6 +30,18 @@ static void __init rtd1195_reserve(void) rtd1195_memblock_remove(0x18100000, 0x01000000); } +static void __init rtd1195_init_time(void) +{ + void __iomem *base; + + base = ioremap(0xff018000, 4); + writel_relaxed(0x1, base); + iounmap(base); + + of_clk_init(NULL); + timer_probe(); +} + static const char *const rtd1195_dt_compat[] __initconst = { "realtek,rtd1195", NULL @@ -34,6 +49,7 @@ static const char *const rtd1195_dt_compat[] __initconst = { DT_MACHINE_START(rtd1195, "Realtek RTD1195") .dt_compat = rtd1195_dt_compat, + .init_time = rtd1195_init_time, .reserve = rtd1195_reserve, .l2c_aux_val = 0x0, .l2c_aux_mask = ~0x0,