From patchwork Thu Nov 21 05:02:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 179896 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp3086029ilf; Wed, 20 Nov 2019 21:02:38 -0800 (PST) X-Google-Smtp-Source: APXvYqxa1dMi+zhwvoDUNymnAMXEy0HCnRH+mIaCLeHJYg1rtwEYzowS+DQ+SEuR7djnZgWLdrue X-Received: by 2002:adf:f386:: with SMTP id m6mr7969459wro.201.1574312558213; Wed, 20 Nov 2019 21:02:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574312558; cv=none; d=google.com; s=arc-20160816; b=oxdzpMPH+i5bjFr88LzUlrQcaU/PoTOUKSuK0yWcbcRhkGwb7FYPXSnkTN7f0Hw6B7 XTM9UcHHCgkcN8mjEnQjsphmFnzigZUuO2eGn1mfrojwRLYvukVHVMIMim1/jx5Rqsi/ KboZd5hC0PEcwRDN6yuSaxLRzleUfD0GxPbOQJO7pUBF8Xu6skMVODvR9i2uCF2vf1A3 JpO3SKR24BcaLQ9I+GtrulMPm1pZJ7cnBguytYLA5pIPxg0phFc3IIFK7oK1AmhXbn70 swhkE6RUHWKHx2eP23LScON429dm5by6eej5XPSABJyQEqskI4y/HZtQskBTTd5XZShV yrPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=k+S+3zAThxPQfZJBt50I15a1IVgv5l9y1Silgh8WwbA=; b=MzJh8Lmmdj5MaTFa8f1fEr58ytjoJ62sz6tgtXmj+brBrGVDnGxL5WdV9ucQIm9dcA 7DElZuT/MY6RBUgco3baI29uag88jepsX50YvZxlZR/WrsYnTjKAMkfu3Negy7/WceQ4 vd+MoyVp4Cc8hn8QHvwMiHpzKK8fi5pTYWgpead9roKtHftxghGr24Rk8wiVyD+ijV7v sEq/mEyqKzHrQU+/oB5G3lfEac08IF74ilMeHMl3fUE1EwYvdzhg3vApJjhuyaBlEHzq nTRauJ9S9DKQ5X4heGfDH5QCzCIsflGDvSDVBOKudV1hYiHFAleDGZRydGkWXXpaIOgq 23sg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h20si1499395edj.48.2019.11.20.21.02.37; Wed, 20 Nov 2019 21:02:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726722AbfKUFCY (ORCPT + 26 others); Thu, 21 Nov 2019 00:02:24 -0500 Received: from mx2.suse.de ([195.135.220.15]:36428 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726165AbfKUFCV (ORCPT ); Thu, 21 Nov 2019 00:02:21 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id A2994B016; Thu, 21 Nov 2019 05:02:19 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v5 4/9] arm64: dts: realtek: rtd129x: Add irq muxes and UART interrupts Date: Thu, 21 Nov 2019 06:02:03 +0100 Message-Id: <20191121050208.11324-5-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191121050208.11324-1-afaerber@suse.de> References: <20191121050208.11324-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add iso and misc IRQ mux DT nodes to RTD129x SoC family. Update the UART DT nodes with interrupts from these muxes, so that UART0 can be used without earlycon. Signed-off-by: Andreas Färber --- v4 -> v5: Unchanged v3 -> v4: * Rebased onto chip-info and r-bus * Dropped schema-violating second interrupts for UART1 and UART2 v2 -> v3: * Added nodes to rtd129x.dtsi instead of rtd1295.dtsi * Adopted misc compatible string * Renamed node label from irq_mux to misc_irq_mux for clarity v1 -> v2: * Rebased arch/arm64/boot/dts/realtek/rtd129x.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index 7d56c9f5d48a..188b4f256917 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -86,6 +86,14 @@ #reset-cells = <1>; }; + iso_irq_mux: interrupt-controller@7000 { + compatible = "realtek,rtd1295-iso-irq-mux"; + reg = <0x7000 0x100>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + iso_reset: reset-controller@7088 { compatible = "snps,dw-low-reset"; reg = <0x7088 0x4>; @@ -105,6 +113,8 @@ reg-io-width = <4>; clock-frequency = <27000000>; resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; + interrupt-parent = <&iso_irq_mux>; + interrupts = <2>; status = "disabled"; }; @@ -115,6 +125,14 @@ <0x171d8 0x4>; }; + misc_irq_mux: interrupt-controller@1b000 { + compatible = "realtek,rtd1295-misc-irq-mux"; + reg = <0x1b000 0x100>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + uart1: serial@1b200 { compatible = "snps,dw-apb-uart"; reg = <0x1b200 0x100>; @@ -122,6 +140,8 @@ reg-io-width = <4>; clock-frequency = <432000000>; resets = <&reset2 RTD1295_RSTN_UR1>; + interrupt-parent = <&misc_irq_mux>; + interrupts = <3>; status = "disabled"; }; @@ -132,6 +152,8 @@ reg-io-width = <4>; clock-frequency = <432000000>; resets = <&reset2 RTD1295_RSTN_UR2>; + interrupt-parent = <&misc_irq_mux>; + interrupts = <8>; status = "disabled"; }; };