From patchwork Tue Nov 19 14:16:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 179753 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp697642ilf; Tue, 19 Nov 2019 06:17:38 -0800 (PST) X-Google-Smtp-Source: APXvYqzzUhqLHlqUvepD4yJ+FcR9EXgrhSmzPGF4QOHfL9izq2NnOW1zmNhI5xdBvLRJj5E8HQ3p X-Received: by 2002:adf:f504:: with SMTP id q4mr19413374wro.160.1574173057824; Tue, 19 Nov 2019 06:17:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574173057; cv=none; d=google.com; s=arc-20160816; b=SUEvQO4IzmnmXpX50odweUFC+y1iTKUlKMoVAVUSpY6UKuV7tsg9JuJPa77IZ9Mew1 AEPk01Cl2o4W9WRKp9oik0vm1UuGsawwatJ3+AEt9pTrA4aKlPeH93HLiN8EFOHVhko4 xAJbbWqTT00tKMy+tGLR8/bSo+PEcBCcgXEprfsZnWrHI6mcZt9eS40jFIkwbfPuy/m7 u0ilm9fJ7aqEwJwpxinZaGjPvMvck8dosASDg+O48cHnytxRrkQJTf/D6pRrj9nW/kmE yWCrNuUXhTYZfKG2FH+IqN8ygcY3SVw8QZKjKyCwH9/MgYGfrYPZMsNUm1GQbzj2kJwG nAgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=w2BQbsXp7az7bcoun2krzNlLIcoDgn66hZHZAA6d6gY=; b=Bl2kQS8XxuEJ6VhAeujbw31YodbF0WBHzkZ+3w4XCWDUtIiHXUasg+EWysP14sq6wx QwW2Zuq0ppLhchHcJ3beLNytUBcGH1chIISSh0eGdJWYzvFyTh39mRswnqPxN8KHv3NI D9ApFAsclRULZHeXQ+srY27gAuGOUWKN+mUq9sFn2/W9w0YBTIyHPApDK7+twQq9CSlU r5saGCWD/n27OZc23kiFBbg2rvep6e0zZUUsnw/LoNW5W1rIspiNuU089ZJaELwdMNvP 3glDq1BuHOpOl0kjTxXot6iR6lqnsXaJ2uNOGdXhb3i2t9UC210f+XfxSolnfEW+K4VQ jcfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Wd40Z9gp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s10si14693950edh.138.2019.11.19.06.17.37; Tue, 19 Nov 2019 06:17:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Wd40Z9gp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728312AbfKSORf (ORCPT + 26 others); Tue, 19 Nov 2019 09:17:35 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:50620 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728287AbfKSORd (ORCPT ); Tue, 19 Nov 2019 09:17:33 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAJEHVOT017759; Tue, 19 Nov 2019 08:17:31 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574173051; bh=w2BQbsXp7az7bcoun2krzNlLIcoDgn66hZHZAA6d6gY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Wd40Z9gpNgIYC5ZNwb7C5DkaV8c7uFMbd8fCU9BlXst1cNT3PRs9gQx8D/nUUvnNK bYfSoopB3eQTdjxJSQ+lp2sU/0E0hLn/eFA+3hS1XwqpbsfaZy9FgsFqyGrEnFx5v3 pysote7BJv1kxVJ86XjbBxPVXm+vSNirz9oUc8tc= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAJEHVbC054258 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 19 Nov 2019 08:17:31 -0600 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 19 Nov 2019 08:17:30 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 19 Nov 2019 08:17:30 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEGvZ8027070; Tue, 19 Nov 2019 08:17:28 -0600 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCHv2 15/15] remoteproc/omap: add watchdog functionality for remote processors Date: Tue, 19 Nov 2019 16:16:45 +0200 Message-ID: <20191119141645.19777-16-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191119141645.19777-1-t-kristo@ti.com> References: <20191119141645.19777-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna Remote processors can be stuck in a loop, and may not be recoverable if they do not have a built-in watchdog. The watchdog implementation for OMAP remote processors uses external gptimers that can be used to interrupt both the Linux host as well as the remote processor. Each remote processor is responsible for refreshing the timer during normal behavior - during OS task scheduling or entering the idle loop properly. During a watchdog condition (executing a tight loop causing no scheduling), the host processor gets interrupts and schedules a recovery for the corresponding remote processor. The remote processor may also get interrupted to be able to print a back trace. A menuconfig option has also been added to enable/disable the Watchdog functionality, with the default as disabled. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- v2: - changed to use ti,watchdog-timers property drivers/remoteproc/Kconfig | 12 +++ drivers/remoteproc/omap_remoteproc.c | 155 ++++++++++++++++++++++++--- 2 files changed, 155 insertions(+), 12 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index d6450d7fcf92..b2eaa18ad503 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -42,6 +42,18 @@ config OMAP_REMOTEPROC It's safe to say N here if you're not interested in multimedia offloading or just want a bare minimum kernel. +config OMAP_REMOTEPROC_WATCHDOG + bool "OMAP remoteproc watchdog timer" + depends on OMAP_REMOTEPROC + default n + help + Say Y here to enable watchdog timer for remote processors. + + This option controls the watchdog functionality for the remote + processors in OMAP. Dedicated OMAP DMTimers are used by the remote + processors and triggers the timer interrupt upon a watchdog + detection. + config WKUP_M3_RPROC tristate "AMx3xx Wakeup M3 remoteproc support" depends on SOC_AM33XX || SOC_AM43XX diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index e024a1cefbbf..b01faebd0ab7 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -73,10 +74,12 @@ struct omap_rproc_mem { * struct omap_rproc_timer - data structure for a timer used by a omap rproc * @odt: timer pointer * @timer_ops: OMAP dmtimer ops for @odt timer + * @irq: timer irq */ struct omap_rproc_timer { struct omap_dm_timer *odt; const struct omap_dm_timer_ops *timer_ops; + int irq; }; /** @@ -87,6 +90,7 @@ struct omap_rproc_timer { * @mem: internal memory regions data * @num_mems: number of internal memory regions * @num_timers: number of rproc timer(s) + * @num_wd_timers: number of rproc watchdog timers * @timers: timer(s) info used by rproc * @autosuspend_delay: auto-suspend delay value to be used for runtime pm * @need_resume: if true a resume is needed in the system resume callback @@ -103,6 +107,7 @@ struct omap_rproc { struct omap_rproc_mem *mem; int num_mems; int num_timers; + int num_wd_timers; struct omap_rproc_timer *timers; int autosuspend_delay; bool need_resume; @@ -218,6 +223,81 @@ static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) return timer->timer_ops->free(timer->odt); } +/** + * omap_rproc_get_timer_irq - get the irq for a timer + * @timer - handle to a OMAP rproc timer + * + * This function is used to get the irq associated with a watchdog timer. The + * function is called by the OMAP remoteproc driver to register a interrupt + * handler to handle watchdog events on the remote processor. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_get_timer_irq(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->get_irq(timer->odt); +} + +/** + * omap_rproc_ack_timer_irq - acknowledge a timer irq + * @timer: handle to a OMAP rproc timer + * + * This function is used to clear the irq associated with a watchdog timer. The + * The function is called by the OMAP remoteproc upon a watchdog event on the + * remote processor to clear the interrupt status of the watchdog timer. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline void omap_rproc_ack_timer_irq(struct omap_rproc_timer *timer) +{ + timer->timer_ops->write_status(timer->odt, OMAP_TIMER_INT_OVERFLOW); +} + +/** + * omap_rproc_watchdog_isr - Watchdog ISR handler for remoteproc device + * @irq: IRQ number associated with a watchdog timer + * @data: IRQ handler data + * + * This ISR routine executes the required necessary low-level code to + * acknowledge a watchdog timer interrupt. There can be multiple watchdog + * timers associated with a rproc (like IPUs which have 2 watchdog timers, + * one per Cortex M3/M4 core), so a lookup has to be performed to identify + * the timer to acknowledge its interrupt. + * + * The function also invokes rproc_report_crash to report the watchdog event + * to the remoteproc driver core, to trigger a recovery. + * + * Return: IRQ_HANDLED or IRQ_NONE + */ +static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data) +{ + struct rproc *rproc = data; + struct omap_rproc *oproc = rproc->priv; + struct device *dev = rproc->dev.parent; + struct omap_rproc_timer *timers = oproc->timers; + struct omap_rproc_timer *wd_timer = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; + int i; + + for (i = oproc->num_timers; i < num_timers; i++) { + if (timers[i].irq > 0 && irq == timers[i].irq) { + wd_timer = &timers[i]; + break; + } + } + + if (!wd_timer) { + dev_err(dev, "invalid timer\n"); + return IRQ_NONE; + } + + omap_rproc_ack_timer_irq(wd_timer); + + rproc_report_crash(rproc, RPROC_WATCHDOG); + + return IRQ_HANDLED; +} + /** * omap_rproc_enable_timers - enable the timers for a remoteproc * @rproc: handle of a remote processor @@ -239,19 +319,26 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) struct omap_rproc_timer *timers = oproc->timers; struct device *dev = rproc->dev.parent; struct device_node *np = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; - if (oproc->num_timers <= 0) + if (num_timers <= 0) return 0; if (!configure) goto start_timers; - for (i = 0; i < oproc->num_timers; i++) { - np = of_parse_phandle(dev->of_node, "ti,timers", i); + for (i = 0; i < num_timers; i++) { + if (i < oproc->num_timers) + np = of_parse_phandle(dev->of_node, "ti,timers", i); + else + np = of_parse_phandle(dev->of_node, + "ti,watchdog-timers", + (i - oproc->num_timers)); if (!np) { ret = -ENXIO; dev_err(dev, "device node lookup for timer at index %d failed: %d\n", - i, ret); + i < oproc->num_timers ? i : + i - oproc->num_timers, ret); goto free_timers; } @@ -274,12 +361,14 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) if (!timer_ops || !timer_ops->request_by_node || !timer_ops->set_source || !timer_ops->set_load || !timer_ops->free || !timer_ops->start || - !timer_ops->stop) { + !timer_ops->stop || !timer_ops->get_irq || + !timer_ops->write_status) { ret = -EINVAL; dev_err(dev, "device does not have required timer ops\n"); goto put_node; } + timers[i].irq = -1; timers[i].timer_ops = timer_ops; ret = omap_rproc_request_timer(dev, np, &timers[i]); if (ret) { @@ -288,10 +377,33 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) goto put_node; } of_node_put(np); + + if (i >= oproc->num_timers) { + timers[i].irq = omap_rproc_get_timer_irq(&timers[i]); + if (timers[i].irq < 0) { + dev_err(dev, "get_irq for timer %p failed: %d\n", + np, timers[i].irq); + ret = -EBUSY; + goto free_timers; + } + + ret = request_irq(timers[i].irq, + omap_rproc_watchdog_isr, IRQF_SHARED, + "rproc-wdt", rproc); + if (ret) { + dev_err(dev, "error requesting irq for timer %p\n", + np); + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + timers[i].irq = -1; + goto free_timers; + } + } } start_timers: - for (i = 0; i < oproc->num_timers; i++) + for (i = 0; i < num_timers; i++) omap_rproc_start_timer(&timers[i]); return 0; @@ -299,9 +411,12 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) of_node_put(np); free_timers: while (i--) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } return ret; @@ -322,16 +437,20 @@ static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) int i; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_timer *timers = oproc->timers; + int num_timers = oproc->num_timers + oproc->num_wd_timers; - if (oproc->num_timers <= 0) + if (num_timers <= 0) return 0; - for (i = 0; i < oproc->num_timers; i++) { + for (i = 0; i < num_timers; i++) { omap_rproc_stop_timer(&timers[i]); if (configure) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } } @@ -1094,6 +1213,7 @@ static int omap_rproc_probe(struct platform_device *pdev) struct omap_rproc *oproc; struct rproc *rproc; const char *firmware; + int num_timers; int ret; struct reset_control *reset; @@ -1146,16 +1266,27 @@ static int omap_rproc_probe(struct platform_device *pdev) oproc->num_timers = 0; } - if (oproc->num_timers) { +#ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG + oproc->num_wd_timers = + of_count_phandle_with_args(np, "ti,watchdog-timers", NULL); + if (oproc->num_wd_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have watchdog timers, status = %d\n", + oproc->num_wd_timers); + oproc->num_wd_timers = 0; + } +#endif + + if (oproc->num_timers || oproc->num_wd_timers) { + num_timers = oproc->num_timers + oproc->num_wd_timers; oproc->timers = devm_kzalloc(&pdev->dev, sizeof(*oproc->timers) - * oproc->num_timers, GFP_KERNEL); + * num_timers, GFP_KERNEL); if (!oproc->timers) { ret = -ENOMEM; goto free_rproc; } - dev_dbg(&pdev->dev, "device has %d tick timers\n", - oproc->num_timers); + dev_dbg(&pdev->dev, "device has %d tick timers and %d watchdog timers\n", + oproc->num_timers, oproc->num_wd_timers); } init_completion(&oproc->pm_comp);