From patchwork Mon Nov 11 03:04:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 179050 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp6076375ilf; Sun, 10 Nov 2019 19:05:18 -0800 (PST) X-Google-Smtp-Source: APXvYqyTWzxVs6z8cOp4NxTctACIoLSE3CNEXBem5LiwyRKz5IxSMbA1k6wJZKQdsEj30KrTwmHF X-Received: by 2002:a50:f096:: with SMTP id v22mr24401717edl.149.1573441518116; Sun, 10 Nov 2019 19:05:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573441518; cv=none; d=google.com; s=arc-20160816; b=mZiCmfS+w6+zk4FgJsPPDUXqrAil68hxJSBflRHW/hqQVr/atRQFCKFZC9/2ohUnKj sjbskThP8Kk1BhfCrJeP1VLDan/Ep5fv5w0VooEBzBrymC7qGzZfi45GDLN6HdpE7vpv /u7wws46NzzJKQ/ekStiQkmTDGtAsftF4nWna+A55705etBKKTxryr19bkTaWwXLNNjF hFDmIjEFqhW219m9OHAbgoy10zDPrPYBYr7pw9WQCPFGTQFWkw9bber0w1TTndQdC6fo 4ULv6mPBUzlFRYwx1F+ikRdQINPQWiWx1Z4u3GKMqah3Baauh9oiS/1nEqKTx53sCr3S 79ZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lTAc5uf3Kw4K025QZvoKHR2RLVaBYrZ67VB6eNbSZpc=; b=RRi5PHnplTOFFGstG1W2mmpUdFzVdtEdo1KgwuQIv/5gvnONFy76h/muOlvWtzoldm YOxxnMGF2OsNO+JrJvNegC6tzgcMu3jMgI+EMTrCGnbvl/8clvkfrehtn9nCEVC5cg6B lqkEpv21LEfrOmmbrZSAQcthScGCFRowMgI+OkjTqGs9RK5S+Af+M89k43X1DKl/z9qs nc8N8QZWh/sGbj9FnoNzk/g1ZMHozj1lnW6TcDrjpKg2sDlnYFJzd0iFdi0H5+5PdDnY ECANqO+Lt29+mnB3Q196fFU1sCesccsqIK+OhSwQJNBF7PxkOZFxDie2NyWIboWAY6t3 CHWw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 14si9407860edz.130.2019.11.10.19.05.17; Sun, 10 Nov 2019 19:05:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727049AbfKKDFO (ORCPT + 26 others); Sun, 10 Nov 2019 22:05:14 -0500 Received: from mx2.suse.de ([195.135.220.15]:54290 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726756AbfKKDEv (ORCPT ); Sun, 10 Nov 2019 22:04:51 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id E0EC3AFF7; Mon, 11 Nov 2019 03:04:48 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH 1/7] arm64: dts: realtek: rtd129x: Fix GIC CPU masks for RTD1293 Date: Mon, 11 Nov 2019 04:04:28 +0100 Message-Id: <20191111030434.29977-2-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191111030434.29977-1-afaerber@suse.de> References: <20191111030434.29977-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert from GIC_CPU_MASK_RAW() to GIC_CPU_MASK_SIMPLE(). In case of RTD1293 adjust the arch timer and VGIC interrupts' CPU masks to its smaller number of CPUs. Fixes: cf976f660ee8 ("arm64: dts: realtek: Add RTD1293 and Synology DS418j") Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1293.dtsi | 12 ++++++++---- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 8 ++++---- arch/arm64/boot/dts/realtek/rtd1296.dtsi | 8 ++++---- 3 files changed, 16 insertions(+), 12 deletions(-) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd1293.dtsi b/arch/arm64/boot/dts/realtek/rtd1293.dtsi index bd4e22723f7b..2d92b56ac94d 100644 --- a/arch/arm64/boot/dts/realtek/rtd1293.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1293.dtsi @@ -36,16 +36,20 @@ timer { compatible = "arm,armv8-timer"; interrupts = , + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, ; + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; }; }; &arm_pmu { interrupt-affinity = <&cpu0>, <&cpu1>; }; + +&gic { + interrupts = ; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 93f0e1d97721..34f6cc6f16fe 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -61,13 +61,13 @@ timer { compatible = "arm,armv8-timer"; interrupts = , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, ; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; }; diff --git a/arch/arm64/boot/dts/realtek/rtd1296.dtsi b/arch/arm64/boot/dts/realtek/rtd1296.dtsi index 0f9e59cac086..fb864a139c97 100644 --- a/arch/arm64/boot/dts/realtek/rtd1296.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1296.dtsi @@ -50,13 +50,13 @@ timer { compatible = "arm,armv8-timer"; interrupts = , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, ; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; };