From patchwork Tue Nov 5 23:55:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sami Tolvanen X-Patchwork-Id: 178577 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1463546ilf; Tue, 5 Nov 2019 15:56:30 -0800 (PST) X-Google-Smtp-Source: APXvYqxNxxqI2alIM7Z2dZyjsXllhtPOYTv0bziqvOf763OzeMATnok9IpDaEQ1VMYP6Ihz5Y/GJ X-Received: by 2002:a50:fe96:: with SMTP id d22mr39573669edt.227.1572998189941; Tue, 05 Nov 2019 15:56:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1572998189; cv=none; d=google.com; s=arc-20160816; b=eD7uuu/zAhcSiJRZxIl2zv52kckM40N5CK93B3xPyk/ml6InCxd/pCZpwdifVUOQL4 jM5zPcb1muTLEDFJEav1p+35dqLJduiR86PVzGVR3dVE0lhGBn8gDLEkhzwAK76ib2Jy dLPR0kAcaeYjWnH08wZJUg+DRJyvdB1Qfdy9Oq1WPf/FCCl3tWusKQ876y9AcZ5B/L+B EGx03MvnAxiXpU3enPmLi0Dc4pRD31n5mnoSY3quDywj0OEFXAcuZ3TdUBAt+Rr7BtMa LHeBr0ClgnkxCnG2GDTukkoJzm0a97kH06ljsTYbpgqK/Hkteuc5wHDbdICLjhpXYGFY ea6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:dkim-signature; bh=E806Ihq7Qr5kwAxZ8O8jq/5GK0i44oON304BuEfvZ08=; b=e/n4Wpyy96Hes+rVQe/owfC7jDAIyEW5l+JeB1NIk3U2KliQtHosWYvHSnrdLUyuVw 3irG+1CbUQFDyY3bHYMJ6d1Hdk+xqmwxJu6yJG+Wky1jL1TrmciIOn/qVj+3/5wFXbW3 DnR0olat2RfKvwu89kB0Y4cwtNh5gg5LRqDK6QZtbhhGbhIX6vlCL92Wn1cDeAI9QbDo vnZF4Gn/TTgXV4s/sZ9khpd+AC8KDxl1gPMV9336BBbHV7IFw80ZSE4l/Bz3BQalTjOo vfwRCTd0QBe5bmDbkNrurkPelFhN3MlXQqmHdC8svPRoT88GkvYiIwFbh9e/ospP/pKS OLaA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=QDgKQccA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l8si15194537ejr.125.2019.11.05.15.56.29; Tue, 05 Nov 2019 15:56:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=QDgKQccA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730679AbfKEX42 (ORCPT + 26 others); Tue, 5 Nov 2019 18:56:28 -0500 Received: from mail-qt1-f202.google.com ([209.85.160.202]:55933 "EHLO mail-qt1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730579AbfKEX41 (ORCPT ); Tue, 5 Nov 2019 18:56:27 -0500 Received: by mail-qt1-f202.google.com with SMTP id u23so24225651qtb.22 for ; Tue, 05 Nov 2019 15:56:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=E806Ihq7Qr5kwAxZ8O8jq/5GK0i44oON304BuEfvZ08=; b=QDgKQccAQsH+R5h45PS8H6bNgjwH8RGSJOkAG/AGuoy5YWBicw4QukLKRyaCj/ZX4C S4zge4BSm47qikuijSk/1DeLDJdEzJKyjjpMkCVFyBe8iRT+BVtRIzaIEOM4Sg8kMqqp 19PNx89unPNFUWHLbXlCN0veqqqj3T/UMrnqvSODWT2d26uSn9YoutJHq9olqlmfvgF9 quHA5kvZggYfAPkKhiPNj+ueCkFnNP+twN85T1uWZaZ2Qu7624dIYDxVRZ2i6SnFYV+M zMwC8p5EGVUt8lQAk9+5QoxNLcfzBFJJ4Q7ld+hIBbOPsyda1IzIoSUjKf8hfnCm4zFw faOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=E806Ihq7Qr5kwAxZ8O8jq/5GK0i44oON304BuEfvZ08=; b=KDaaHpjqn0eo66FEnhZbH0C3dKP1BVw++RMdFvmLUAe1g0AIJWviZlnVjoaNmG7kzV TRQw4MWTk1MhpcpIF0ZC0jM3sFp2aTZVwtV2QRpazwb9rvLNjM5mOAPK9IU0F1JBzsFB h4LR/on7QRYI4aTGTnlJQ412TrKxZ/SzkT7Vp4XI9ZhIXVUGrjKvcutxPQkoTudPaePx Ml1XYBsHbkkmihr3jJ/U2Yh1Gj3HhtruRM6jtIakMkAsyCUi8XPr0U6Yy1ae/gVDDxMY iXq9X60vM07Ax2Isxv6gk2GsV8JDOeH7qvNO/+78KLH6xf9wxEODeiffjkD8vFZrqLoj MZtQ== X-Gm-Message-State: APjAAAVvhgBXl9lQjMsniO7fBbXmjshQFt44PTLyieRcIPH7KygXBs7P +l36mQmXrg3ZzvYhn5Xo4nyan8Ve6RFxqqTfmgk= X-Received: by 2002:aed:22c8:: with SMTP id q8mr21652726qtc.0.1572998186120; Tue, 05 Nov 2019 15:56:26 -0800 (PST) Date: Tue, 5 Nov 2019 15:55:58 -0800 In-Reply-To: <20191105235608.107702-1-samitolvanen@google.com> Message-Id: <20191105235608.107702-5-samitolvanen@google.com> Mime-Version: 1.0 References: <20191018161033.261971-1-samitolvanen@google.com> <20191105235608.107702-1-samitolvanen@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [PATCH v5 04/14] arm64: kernel: avoid x18 in __cpu_soft_restart From: Sami Tolvanen To: Will Deacon , Catalin Marinas , Steven Rostedt , Masami Hiramatsu , Ard Biesheuvel Cc: Dave Martin , Kees Cook , Laura Abbott , Mark Rutland , Marc Zyngier , Nick Desaulniers , Jann Horn , Miguel Ojeda , Masahiro Yamada , clang-built-linux@googlegroups.com, kernel-hardening@lists.openwall.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sami Tolvanen Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ard Biesheuvel The code in __cpu_soft_restart() uses x18 as an arbitrary temp register, which will shortly be disallowed. So use x8 instead. Link: https://patchwork.kernel.org/patch/9836877/ Signed-off-by: Ard Biesheuvel [Sami: updated commit message] Signed-off-by: Sami Tolvanen Reviewed-by: Mark Rutland Reviewed-by: Kees Cook --- arch/arm64/kernel/cpu-reset.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.24.0.rc1.363.gb1bccd3e3d-goog diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S index 6ea337d464c4..32c7bf858dd9 100644 --- a/arch/arm64/kernel/cpu-reset.S +++ b/arch/arm64/kernel/cpu-reset.S @@ -42,11 +42,11 @@ ENTRY(__cpu_soft_restart) mov x0, #HVC_SOFT_RESTART hvc #0 // no return -1: mov x18, x1 // entry +1: mov x8, x1 // entry mov x0, x2 // arg0 mov x1, x3 // arg1 mov x2, x4 // arg2 - br x18 + br x8 ENDPROC(__cpu_soft_restart) .popsection