From patchwork Mon Nov 4 18:12:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 178456 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp4388962ocf; Mon, 4 Nov 2019 10:13:03 -0800 (PST) X-Google-Smtp-Source: APXvYqxOkp2gYJX1AImHDnRghtLZbuWC9rA+QaHopTkuV7MGZKXQZBGqMCrsTvx7GKQ0wngVHVaQ X-Received: by 2002:a50:a697:: with SMTP id e23mr16855725edc.264.1572891183335; Mon, 04 Nov 2019 10:13:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1572891183; cv=none; d=google.com; s=arc-20160816; b=CaKbj9IEviBtCFqxdQc9HqP4KS56plv1pKiSUK+7Y07LiyzcrkbI30UW+Ua51SzpCv c51VnqYmfWjHa/F3KZeP8j4GINnBDmm3BrYBiywsHpWJ0MaEIa3/nU1iLON8d3o/221r FdbDlntw6ZZm8Ao2LixGJpGDmDJlCoH55VEzvOb6fZeJ8iYaUaJFv1h9faxOxA5jvHcD FhhXBgQ06KpnUfGTuzkw7U4hzCKxhojY2oSFRud80gX2nUywXHcmWli/K047Hv9PopBm 89AHUIw6Z+PUq5Wn23e/KwGydwYky0eJdoNsHgnH3M9f9ZdbemJmUs1UDrGb1DzGXnDI jKmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ciXUSjrJzeNJ7x1YqUH63bTMmxfwRBsuiu2kMzOf67g=; b=KzHMRB7HkwKedtCBGeL9rLTIKF/OCeT9DdPuLroUBSI6WSYJDVjhtZeQ1xxgo/ixaF SKkXfZOgYD48F8+hrUMTs56vKsM6O2W2+jyALcPH2BM6Kr4Goi7UiL6zq6fYO0F2+e72 gbyP+qwXlTydKnz1ph2vmtTlj6wI3dHkn7udt8bTlj7jiadYzQ1VcNlEAFZrG3XPenht bz2Dh5kFhTZquabqYd1AOnaIbUh2Tyqq8svG8hkQYGpU0br96aoYBTVG8t2WQKyHpEjF CwN2ZMLJTrdeE0OU4wFQ+9LCSlhQ5PVmwmEkKcJRmG+PviGg4wUH84a4IVbmOvhhAx5c DFcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H3BBaQmV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p23si7395797ejx.366.2019.11.04.10.13.03; Mon, 04 Nov 2019 10:13:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H3BBaQmV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729537AbfKDSM7 (ORCPT + 26 others); Mon, 4 Nov 2019 13:12:59 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:40063 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729513AbfKDSM4 (ORCPT ); Mon, 4 Nov 2019 13:12:56 -0500 Received: by mail-pf1-f194.google.com with SMTP id r4so12834639pfl.7 for ; Mon, 04 Nov 2019 10:12:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ciXUSjrJzeNJ7x1YqUH63bTMmxfwRBsuiu2kMzOf67g=; b=H3BBaQmVJVl+8T39kKh3UPdS/XpJ9Q2VTPAOpfckdFx1bb9wba7xd/QD+BgQM/9Ah6 9cC/e1iwKmsTGx3zd6x5oC19ft2PPIQuqXTJ93j/EISnxE+eT1tGGclEZ+uL3BzD06++ +K7DYbObU4N+OJQyaBWGMMEg8oWlgwmtmXnNZgeFfFLDTeVnv3I73ibQd3LGkL6CCadO bN2+DYrqCKMeKZK2ugj04lS6vydLyGVv/RMfpSOlVeUE1TCSJH03TdKrVOob2mLH19By Zdlw/wbFj2imiInrA3rrueUMzjeMJvRLmBIRf9t8BeFnmiDUgpC0X1jZWnPCCGR8b8b1 mT4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ciXUSjrJzeNJ7x1YqUH63bTMmxfwRBsuiu2kMzOf67g=; b=LKyvK/rVHrIuzEWsJbUEsGjKQHo3XtOcnnlgGBYMI/7ATCd/AQ/6jlw91zEF4PQF6L 8xIYXHpG5r7UE/Eznk4jTltr0bb0SbPeKyunJoLoa7wFNVmVQAWBXmYz0cQPFhXp5vqb fNecFBrw08lmsG4hWmvUwcq1n/crkaaXRZfbbv4XEcyXYxDIiIpUkx35G1WkCExFMAKH p7Hvr4OFz2c5ZRIF8XemocRoPpqeo11uh3D/npllYVYI6G2SUQtHh8ckXUBxx3xmo/V7 kWY2CqlEjosOdxmQHQATnhp33dBSRfivFMBuoM9WSfiuiiSkoDlzquzD5MVX9Strqi1n kiVw== X-Gm-Message-State: APjAAAUJ5nGkexUkuHbYEPAeJPtnB/rzFosMUzYM1wpl75CQYwYx+SrK Pk+cnS6rMar+ELftVofq3iYvDA== X-Received: by 2002:a63:3e0b:: with SMTP id l11mr28009360pga.448.1572891175644; Mon, 04 Nov 2019 10:12:55 -0800 (PST) Received: from xps15.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [68.147.8.254]) by smtp.gmail.com with ESMTPSA id o12sm16149520pgl.86.2019.11.04.10.12.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Nov 2019 10:12:54 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/14] dt-bindings: arm: coresight: Add support for coresight-loses-context-with-cpu Date: Mon, 4 Nov 2019 11:12:39 -0700 Message-Id: <20191104181251.26732-3-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191104181251.26732-1-mathieu.poirier@linaro.org> References: <20191104181251.26732-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andrew Murray Some coresight components, because of choices made during hardware integration, require their state to be saved and restored across CPU low power states. The software has no reliable method of detecting when save/restore is required thus let's add a binding to inform the kernel. Signed-off-by: Andrew Murray Reviewed-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose Reviewed-by: Rob Herring Signed-off-by: Mathieu Poirier --- Documentation/devicetree/bindings/arm/coresight.txt | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index fcc3bacfd8bc..d02c42d21f2f 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -87,6 +87,15 @@ its hardware characteristcs. * port or ports: see "Graph bindings for Coresight" below. +* Optional properties for all components: + + * arm,coresight-loses-context-with-cpu : boolean. Indicates that the + hardware will lose register context on CPU power down (e.g. CPUIdle). + An example of where this may be needed are systems which contain a + coresight component and CPU in the same power domain. When the CPU + powers down the coresight component also powers down and loses its + context. This property is currently only used for the ETM 4.x driver. + * Optional properties for ETM/PTMs: * arm,cp14: must be present if the system accesses ETM/PTM management