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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id o12sm16149520pgl.86.2019.11.04.10.13.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Nov 2019 10:13:03 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/14] coresight: etm4x: Add view comparator settings API to sysfs. Date: Mon, 4 Nov 2019 11:12:47 -0700 Message-Id: <20191104181251.26732-11-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191104181251.26732-1-mathieu.poirier@linaro.org> References: <20191104181251.26732-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mike Leach Currently it is not possible to view the current settings of a given address comparator without knowing what type it is set to. For example, if a comparator is set as an addr_start comparator, attempting to read addr_stop for the same index will result in an error. addr_cmp_view is added to allow the user to see the current settings of the indexed address comparator without resorting to trial and error when the set type is not known. Signed-off-by: Mike Leach Reviewed-by: Leo Yan Signed-off-by: Mathieu Poirier --- .../coresight/coresight-etm4x-sysfs.c | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) -- 2.17.1 diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 1cfbddda0b4d..1768e7286a9e 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -1275,6 +1275,57 @@ static ssize_t addr_exlevel_s_ns_store(struct device *dev, } static DEVICE_ATTR_RW(addr_exlevel_s_ns); +static const char * const addr_type_names[] = { + "unused", + "single", + "range", + "start", + "stop" +}; + +static ssize_t addr_cmp_view_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 idx, addr_type; + unsigned long addr_v, addr_v2, addr_ctrl; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + struct etmv4_config *config = &drvdata->config; + int size = 0; + bool exclude = false; + + spin_lock(&drvdata->spinlock); + idx = config->addr_idx; + addr_v = config->addr_val[idx]; + addr_ctrl = config->addr_acc[idx]; + addr_type = config->addr_type[idx]; + if (addr_type == ETM_ADDR_TYPE_RANGE) { + if (idx & 0x1) { + idx -= 1; + addr_v2 = addr_v; + addr_v = config->addr_val[idx]; + } else { + addr_v2 = config->addr_val[idx + 1]; + } + exclude = config->viiectlr & BIT(idx / 2 + 16); + } + spin_unlock(&drvdata->spinlock); + if (addr_type) { + size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] %s %#lx", idx, + addr_type_names[addr_type], addr_v); + if (addr_type == ETM_ADDR_TYPE_RANGE) { + size += scnprintf(buf + size, PAGE_SIZE - size, + " %#lx %s", addr_v2, + exclude ? "exclude" : "include"); + } + size += scnprintf(buf + size, PAGE_SIZE - size, + " ctrl(%#lx)\n", addr_ctrl); + } else { + size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] unused\n", idx); + } + return size; +} +static DEVICE_ATTR_RO(addr_cmp_view); + static ssize_t vinst_pe_cmp_start_stop_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -2120,6 +2171,7 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_addr_ctxtype.attr, &dev_attr_addr_context.attr, &dev_attr_addr_exlevel_s_ns.attr, + &dev_attr_addr_cmp_view.attr, &dev_attr_vinst_pe_cmp_start_stop.attr, &dev_attr_seq_idx.attr, &dev_attr_seq_state.attr,