From patchwork Mon Nov 4 01:39:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 178380 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp851436ilf; Sun, 3 Nov 2019 17:40:34 -0800 (PST) X-Google-Smtp-Source: APXvYqwcFIfxVgFjFaRw2FZA5XKXEnhXuLNXksQyvJdfeeSARWyI9NDqDDaTBXigBPCmYBrBjHUs X-Received: by 2002:a17:906:80c1:: with SMTP id a1mr22064750ejx.37.1572831634679; Sun, 03 Nov 2019 17:40:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1572831634; cv=none; d=google.com; s=arc-20160816; b=m1SvK1+HlHfyx0pyd0sx1niKtAsEN0dfnhTx7vZ9/4qce35eEjhL+En32aNzJ7uxEC Wzcje2elZkNFug3Mh6Bk9JfMbAe5i5TSAmu3WOwyrEQz/HkNu1VY4UUSZ17/H+mXvdu6 u53GdYHNa+DujJdcb2iYnI52JMnT28FoKvIua8V2NcUSvxN4lByFSg5JNQMN7LvV2Jc/ EWSqZeXbpXsZ2zui1IrLVDSimBnzFubRB9AkrPLPFoLpKkch+gln8PfiDAyi2bLp4t18 pnx40Uxnyt8y3fGkcJIYe3oHC5zwZ+4yh6GODBN9O0PjsR6AEFSlkE6qt0Hzcp7ZnJ79 gBaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=pd2jL0hfl2b0pqMOsOWY9chZtsRB7hzU/Gg3pzP3EJM=; b=Msn56cABMcbe9kR8dZ8ab+1k1nfDpdEYoBpxtJE7Qf/rfmqc95Tk60X1fImeCr53K+ FDqG6MiGjb8A5jEl2dvvpITajedSMoya8cND6LeDcREerX33R6s2nhOdyyqqvUNxwRSa O5WdUtq+mDOI/D5CQEP3rIcjZjO0Dxu/gGIVbQrJ2za+MhozmkDWn4clTTjShRfPsDdm oryUmrLqMKLAvfhsQf9fI4Q7hUNtPbxK1VFQsuhWBiaIUTd48/8ash0bT74LATrvByVj ofx1coFX8ybrirs2EbceAVOz5wbFBDLbJM9qcuoaIM6eqlNUmidfMFvsAKA5vmJHuuu0 2yuw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id pw16si1127765ejb.119.2019.11.03.17.40.33; Sun, 03 Nov 2019 17:40:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728900AbfKDBkc (ORCPT + 26 others); Sun, 3 Nov 2019 20:40:32 -0500 Received: from mx2.suse.de ([195.135.220.15]:55830 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728288AbfKDBk3 (ORCPT ); Sun, 3 Nov 2019 20:40:29 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 56B4BB22E; Mon, 4 Nov 2019 01:40:27 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 5/7] ARM: dts: rtd1195: Add Mali node Date: Mon, 4 Nov 2019 02:39:30 +0100 Message-Id: <20191104013932.22505-6-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191104013932.22505-1-afaerber@suse.de> References: <20191104013932.22505-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a DT node for the Mali GPU. Signed-off-by: Andreas Färber --- arch/arm/boot/dts/rtd1195.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.16.4 diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index 774f95d544a3..ae8843782cfa 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -292,6 +292,25 @@ status = "disabled"; }; + /* TODO 0x18030000 0x10000 or 0x18003000 0x1000? */ + mali: gpu@18030000 { + compatible = "realtek,rtd1195-mali", "arm,mali-400"; + reg = <0x18030000 0x10000>; + /* TODO which bus clk to pass? */ + clocks = <&clkc RTD1195_CLK_EN_GPU>, <&osc27M>; + clock-names = "core", "bus"; + resets = <&reset1 RTD1195_RSTN_GPU>; + interrupts = , + , + , + , + , + ; + interrupt-names = "gp", "gpmmu", + "pp0", "ppmmu0", + "pp1", "ppmmu1"; + }; + gic: interrupt-controller@ff011000 { compatible = "arm,cortex-a7-gic"; reg = <0xff011000 0x1000>,