From patchwork Sun Oct 27 21:01:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 177866 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2537366ill; Sun, 27 Oct 2019 14:16:05 -0700 (PDT) X-Google-Smtp-Source: APXvYqz0MujM+qUix9IAoV4JEEJQ/Y0n7wxmUVL7hBuDzj6sRXU71nfnE6q2qFdFz4+VJUyZYHcf X-Received: by 2002:a17:906:5502:: with SMTP id r2mr14114473ejp.3.1572210964847; Sun, 27 Oct 2019 14:16:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572210964; cv=none; d=google.com; s=arc-20160816; b=aJtKCNnHk9G6F7MiWMpfNfa5IVahp7yqdZtoweRgzLoOMd7mS2jvNGHVGXYDW1+tqV qshVhdU65ETqIXQmqfK21ZGpqeHn5/gSNju+Kye3kEmYGJeqOLId2JnFbIitpfU63FPW dPr/AjGyTB4LO4wzCVfTgjV2ckVNaSxoqhWmSC9CHIBpxyceFnHU4oGTtSAIiThS/Uyu TMPkdB2tZ9zgFOJ/6cNbqSEDq4zRQKzTFHnEAD7z2hLHii8VF50ahM/BjO18T8e6V1xe M98fKXyd9DgwrGyDLU9YnXFyTyr70AMT1xZbD8Mke0L+svgkf3ET2b7dbykjp+nPEuf4 zWCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=7FByywA7nL0Uub5SyTsyxVAalxD4JLH7TXv+A9K6jNY=; b=zx/JmWSAtQgyHS1Zk1QMPdx+sAK55Bfen3iAi6bvGGb7Xjitw3enDqwkDP0rIdERlR 52gR0/F8KiqXKNLD/nqmjlBkMtmvceqCRwocQST5TYMfSHRCGC96VX2DwM+zpl7gFcjj 7YM2EnoeFoOMklsgaWSETdBalOFPQxFte82eEh0O5rtTlW/j0S2lvqWiQhdbC47qilKH ++9rv3jZHSpRcyyWLbROXqmbFAYOpbxSC7tc9voUMoj458enUe39QTY0aUdGJK2H0FoH i2U/QdrX3HBXHC9UpEk9qzs+6qKsBrtDHzLB96jySWOtCQOLaBq8+bjTGO1pd950Tsl2 sd3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=hr0pqfHj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c24si6720938edb.328.2019.10.27.14.16.04; Sun, 27 Oct 2019 14:16:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=hr0pqfHj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730747AbfJ0VQB (ORCPT + 26 others); Sun, 27 Oct 2019 17:16:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:35368 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730718AbfJ0VP4 (ORCPT ); Sun, 27 Oct 2019 17:15:56 -0400 Received: from localhost (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B1E94205C9; Sun, 27 Oct 2019 21:15:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210955; bh=8IOV29BNjDY+REp3WUyqDVAt2o6u+fOSAlETP48YXZE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hr0pqfHjpSBNS8p9sB0LYq1W1T43P2Xqbm1Wx1BbsxJuVy33RlO5SKyQyCinBOKLO c1k/Is5GTFeKlYmnVi3MDP7qG2EwiF6ZyIYYBgBaeRVyqH/TWTUnEmZjX5Kq+Awhup oYi8YPitjvuALjLIF9+7cvCA9huC7xv4ZX8FDAQg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Marc Zyngier , Will Deacon Subject: [PATCH 4.19 73/93] arm64: Enable workaround for Cavium TX2 erratum 219 when running SMT Date: Sun, 27 Oct 2019 22:01:25 +0100 Message-Id: <20191027203310.113079555@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191027203251.029297948@linuxfoundation.org> References: <20191027203251.029297948@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marc Zyngier commit 93916beb70143c46bf1d2bacf814be3a124b253b upstream. It appears that the only case where we need to apply the TX2_219_TVM mitigation is when the core is in SMT mode. So let's condition the enabling on detecting a CPU whose MPIDR_EL1.Aff0 is non-zero. Cc: Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/cpu_errata.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -23,6 +23,7 @@ #include #include #include +#include static bool __maybe_unused is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope) @@ -618,6 +619,30 @@ check_branch_predictor(const struct arm6 return (need_wa > 0); } +static const __maybe_unused struct midr_range tx2_family_cpus[] = { + MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), + MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), + {}, +}; + +static bool __maybe_unused +needs_tx2_tvm_workaround(const struct arm64_cpu_capabilities *entry, + int scope) +{ + int i; + + if (!is_affected_midr_range_list(entry, scope) || + !is_hyp_mode_available()) + return false; + + for_each_possible_cpu(i) { + if (MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 0) != 0) + return true; + } + + return false; +} + #ifdef CONFIG_HARDEN_EL2_VECTORS static const struct midr_range arm64_harden_el2_vectors[] = { @@ -802,6 +827,14 @@ const struct arm64_cpu_capabilities arm6 .matches = has_cortex_a76_erratum_1463225, }, #endif +#ifdef CONFIG_CAVIUM_TX2_ERRATUM_219 + { + .desc = "Cavium ThunderX2 erratum 219 (KVM guest sysreg trapping)", + .capability = ARM64_WORKAROUND_CAVIUM_TX2_219_TVM, + ERRATA_MIDR_RANGE_LIST(tx2_family_cpus), + .matches = needs_tx2_tvm_workaround, + }, +#endif { } };