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[209.132.180.67]) by mx.google.com with ESMTP id c26si3868240edx.353.2019.10.18.05.26.13; Fri, 18 Oct 2019 05:26:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Xti78K2E; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2633769AbfJRM0M (ORCPT + 26 others); Fri, 18 Oct 2019 08:26:12 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:48454 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2633690AbfJRM0J (ORCPT ); Fri, 18 Oct 2019 08:26:09 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9ICPvjP066237; Fri, 18 Oct 2019 07:25:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571401557; bh=Q6v3ZsELVVFaq45xRxLW4voHJAlhEXxHc1kVNsr3mZg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Xti78K2E6iFtvT5ieJrsjSg2cPXRXPVMZDL2pC1g4Z+muYBSX/ye2nAE5k03C2+8L zWpysiww5MAzt0Tmtrr9FJENO8U3PPzKjs3ngHZ+UDeq72g+TyhZDY6hrknYAoz42F SyoYMhuGqYR13pT5UQe5ziQJ5DxQ3ZvmQRJ+GkSY= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9ICPvSF091732; Fri, 18 Oct 2019 07:25:57 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 18 Oct 2019 07:25:48 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 18 Oct 2019 07:25:56 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9ICPu3J073328; Fri, 18 Oct 2019 07:25:56 -0500 From: Dan Murphy To: , CC: , , Dan Murphy , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Subject: [PATCH v14 10/19] ARM: dts: imx6dl-yapp4: Add reg property to the lp5562 channel node Date: Fri, 18 Oct 2019 07:25:12 -0500 Message-ID: <20191018122521.6757-11-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191018122521.6757-1-dmurphy@ti.com> References: <20191018122521.6757-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the reg property to each channel node. This update is to accomodate the multicolor framework. In addition to the accomodation this allows the LEDs to be placed on any channel and allow designs to skip channels as opposed to requiring sequential order. Signed-off-by: Dan Murphy CC: Shawn Guo CC: Sascha Hauer CC: Pengutronix Kernel Team CC: Fabio Estevam CC: NXP Linux Team --- arch/arm/boot/dts/imx6dl-yapp4-common.dtsi | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi index e8d800fec637..efc466ed1fea 100644 --- a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi @@ -257,29 +257,35 @@ reg = <0x30>; clock-mode = /bits/ 8 <1>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; - chan0 { + chan@0 { chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; + reg = <0>; }; - chan1 { + chan@1 { chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; + reg = <1>; }; - chan2 { + chan@2 { chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; + reg = <2>; }; - chan3 { + chan@3 { chan-name = "W"; led-cur = /bits/ 8 <0x0>; max-cur = /bits/ 8 <0x0>; + reg = <3>; }; };