From patchwork Thu Oct 10 08:36:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 175721 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1983578ill; Thu, 10 Oct 2019 01:48:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqyknU2NrAhkHKnUtEunvJoDeCSheLdfhEqSbIHvsYm+cCRvswQhS6RqtpDo48L1XUMC4OSA X-Received: by 2002:a17:906:27c5:: with SMTP id k5mr6856821ejc.173.1570697320229; Thu, 10 Oct 2019 01:48:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570697320; cv=none; d=google.com; s=arc-20160816; b=dZowEImYmgY2K8AUmtV1SyETpaz52/lTSYEZN3PoEagE/471Ict31QEMWgQOTAvNLi 3bQFY7xm++zgosOsJrhfk0KQekeunkPeXw+R7fXTCshouhl05X8uUV5DZcl26zfmqJsy RbrpF0vIQxKJzDX4J+uJTQMKXzzqSLZIzRSJJL1BWYhDhe6CbvOc78xb/hmYln/mjH8G B7RQBBPnDe/n0PqZ3B0jIZez/STnGFMl+lQUcO5KYf0THquhgo/AR+HO/G0VYAMs5lWG 7NWwTCbBNGJ+qQMoZWfpw+2rZ6QnFcBLH7JxMzq1emZ83YpHHUS37jXfkKVHBupjtH5T +1Jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4Gx0COiR2Ye479Vl8FELTqenTI8EfrvQSlsGvLEn7P4=; b=HsXXTMaYIF8w2l4hLqnpHN8NUXDMxFmHzGdNkpgr7MUbxR/o2yQ+01rokNZUXBaxI4 m6nrDidH7H5sTx1kxtMLa9eSKfdm2VLKwpbpPYPzAZOzyr2OXb7gFmgRNOn53C7ZKs1q n0wNenOavQyMxJkvavLkdKwTH3syLCM8J7YzkJx7Tf9QzVgZ021UZ8fsF2TUS4VCC++k aphQqts6Ce8diRiMAzECwQiZ/7GuHFg8N3zPIuOoJL2EgZTJph6QUcrwSHIKFtKsuQYX vzTrJxW/1y3mmpW/444rBTc9PXoraVLr8zK1UcGQ8kCUrJqW0bBAfKjvqVWzoEoYm8X3 Fl3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=iP8jm4F8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id si30si2807785ejb.92.2019.10.10.01.48.40; Thu, 10 Oct 2019 01:48:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=iP8jm4F8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389689AbfJJIsi (ORCPT + 26 others); Thu, 10 Oct 2019 04:48:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:54736 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389651AbfJJIsa (ORCPT ); Thu, 10 Oct 2019 04:48:30 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B54632064A; Thu, 10 Oct 2019 08:48:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697310; bh=8/k19fIZ0kkjZNWVifZ4eztuH6N6F6LNK7/z2zqspQM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iP8jm4F8iUj1sU2k2cOVgqnpqWlStKjmZBuX7ppedxWW1X+L/kry5KaSpGxln9uBM sD9ylUVby2ZOPqwJIOVJEs9foRtyFlqGZGD1l+CXI9mmbVWejz11carR8lUrXkvZv2 WWw2m1/GmjNdJVFXj72ECgvBopwkdPqZL52D0bFA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jeremy Linton , Andre Przywara , Catalin Marinas , Stefan Wahren , Will Deacon , Ard Biesheuvel Subject: [PATCH 4.19 096/114] arm64: Always enable ssb vulnerability detection Date: Thu, 10 Oct 2019 10:36:43 +0200 Message-Id: <20191010083613.231594675@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jeremy Linton [ Upstream commit d42281b6e49510f078ace15a8ea10f71e6262581 ] Ensure we are always able to detect whether or not the CPU is affected by SSB, so that we can later advertise this to userspace. Signed-off-by: Jeremy Linton Reviewed-by: Andre Przywara Reviewed-by: Catalin Marinas Tested-by: Stefan Wahren [will: Use IS_ENABLED instead of #ifdef] Signed-off-by: Will Deacon Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- arch/arm64/include/asm/cpufeature.h | 4 ---- arch/arm64/kernel/cpu_errata.c | 9 +++++---- 2 files changed, 5 insertions(+), 8 deletions(-) --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -525,11 +525,7 @@ static inline int arm64_get_ssbd_state(v #endif } -#ifdef CONFIG_ARM64_SSBD void arm64_set_ssbd_mitigation(bool state); -#else -static inline void arm64_set_ssbd_mitigation(bool state) {} -#endif #endif /* __ASSEMBLY__ */ --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -239,7 +239,6 @@ enable_smccc_arch_workaround_1(const str } #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ -#ifdef CONFIG_ARM64_SSBD DEFINE_PER_CPU_READ_MOSTLY(u64, arm64_ssbd_callback_required); int ssbd_state __read_mostly = ARM64_SSBD_KERNEL; @@ -312,6 +311,11 @@ void __init arm64_enable_wa2_handling(st void arm64_set_ssbd_mitigation(bool state) { + if (!IS_ENABLED(CONFIG_ARM64_SSBD)) { + pr_info_once("SSBD disabled by kernel configuration\n"); + return; + } + if (this_cpu_has_cap(ARM64_SSBS)) { if (state) asm volatile(SET_PSTATE_SSBS(0)); @@ -431,7 +435,6 @@ out_printmsg: return required; } -#endif /* CONFIG_ARM64_SSBD */ #ifdef CONFIG_ARM64_ERRATUM_1463225 DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa); @@ -710,14 +713,12 @@ const struct arm64_cpu_capabilities arm6 ERRATA_MIDR_RANGE_LIST(arm64_harden_el2_vectors), }, #endif -#ifdef CONFIG_ARM64_SSBD { .desc = "Speculative Store Bypass Disable", .capability = ARM64_SSBD, .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, .matches = has_ssbd_mitigation, }, -#endif #ifdef CONFIG_ARM64_ERRATUM_1463225 { .desc = "ARM erratum 1463225",