From patchwork Tue Oct 8 20:47:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 175571 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp6207035ill; Tue, 8 Oct 2019 13:49:11 -0700 (PDT) X-Google-Smtp-Source: APXvYqyJJocHtP+2TN4bK3Gi7k0hWytZZbUmH2himHYxhtF1j/EasHV6W1vowv3EOB8lep8Gvm0x X-Received: by 2002:a17:906:1c06:: with SMTP id k6mr30042648ejg.217.1570567751453; Tue, 08 Oct 2019 13:49:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570567751; cv=none; d=google.com; s=arc-20160816; b=DC6UcmOgD1KG+pM0wpjmpTpp9GFWZzAfILkoXAmAk3AofG3BL7Xh9gWbG6zhnQqlUr fIg3Rye4MhCYH4sfD394wcXSLxLsnoh4g8QotxSUiOSUm4cefdzXcpfxuabo2Fe/mfop 2itmAoTs8+g2gHCjrqAfL9Y9MW4hWXTDThGrjwD/9OlqFVBm4D03rxBhuIfjchCk8gYw M8lJM4qs08cEOh6o7LLTo4y7T+SCxdqGDw5q9jasdTRR9NH/iJdWTQyqD23uqgMGWvWb mWcl4KP9ZrLlGWtcsQ0zp0yWUKVtcRk02bomJulOk9gT9+f/5x4ly7FqiFoTyjJ/oF9F HhhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=95PMofJsyIEn3NAsJyz9IppOg+cVPNREQZwHO7yf3yY=; b=JWfdugAn3Epsw5gFfl9wJgM1XJ+nIuJntwK3Ki1uIoK0/EYPvFWmC9oQ2Qgg4XGRB1 JvThwrFqcTC7qLB4X+Pl38HibAWfkFTmBXvSzAqZOqz4dDF2DLejBTOFZSDOZvcboseL xHpBBnD9jlbQMu/11vNaNBkXkGrfKuSBThmmtidPRp+p5JA2SdLLslHzAVJ8o8Hk4Apj xsDIGzjoJBQ/8rVRaqLNmgl3sWRNdhkDgab43+n4+xYpy+VU7vE3cSuOKS61/F2Eh9+0 Jyj5WK2358eLYUGTMNREzw+5FHt4qS+JrHL44niYmSxpQzDaHZ/4iaqrfgARqa3KdsBW avBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tdg+eEAo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p1si98921eda.406.2019.10.08.13.49.11; Tue, 08 Oct 2019 13:49:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tdg+eEAo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731329AbfJHUtH (ORCPT + 26 others); Tue, 8 Oct 2019 16:49:07 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:45794 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731110AbfJHUsY (ORCPT ); Tue, 8 Oct 2019 16:48:24 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x98KmLkx097365; Tue, 8 Oct 2019 15:48:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570567701; bh=95PMofJsyIEn3NAsJyz9IppOg+cVPNREQZwHO7yf3yY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tdg+eEAoVlv1lN9wqyu4XmZvEHmihS3xCSYxRp2RXjYeF2+Ocl04Gta9AD9jkzvjP BcdxCUEoqWRxco5+4D0tMB3f2AU4hqcP3dhG4Yv0Tlu3ls9eNPQhaVizISjcLw0iAS 4q7lnU7WAtJGsJn03iWTNJs0paWs/uZexlAwJidQ= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x98KmLvO062210 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 8 Oct 2019 15:48:21 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 8 Oct 2019 15:48:18 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 8 Oct 2019 15:48:18 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x98KmLrt073119; Tue, 8 Oct 2019 15:48:21 -0500 From: Dan Murphy To: , CC: , , Dan Murphy , Linus Walleij Subject: [PATCH v11 11/16] ARM: dts: ste-href: Add reg property to the LP5521 channel nodes Date: Tue, 8 Oct 2019 15:47:55 -0500 Message-ID: <20191008204800.19870-12-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191008204800.19870-1-dmurphy@ti.com> References: <20191008204800.19870-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the reg property to each channel node. This update is to accomodate the multicolor framework. In addition to the accomodation this allows the LEDs to be placed on any channel and allow designs to skip channels as opposed to requiring sequential order. Signed-off-by: Dan Murphy CC: Linus Walleij --- arch/arm/boot/dts/ste-href.dtsi | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi index 4f6acbd8c040..8a873da102d3 100644 --- a/arch/arm/boot/dts/ste-href.dtsi +++ b/arch/arm/boot/dts/ste-href.dtsi @@ -56,16 +56,21 @@ reg = <0x33>; label = "lp5521_pri"; clock-mode = /bits/ 8 <2>; - chan0 { + #address-cells = <1>; + #size-cells = <0>; + chan@0 { + reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; linux,default-trigger = "heartbeat"; }; - chan1 { + chan@1 { + reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan2 { + chan@2 { + reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; @@ -75,15 +80,20 @@ reg = <0x34>; label = "lp5521_sec"; clock-mode = /bits/ 8 <2>; - chan0 { + #address-cells = <1>; + #size-cells = <0>; + chan@0 { + reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan1 { + chan@1 { + reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan2 { + chan@2 { + reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; };