From patchwork Tue Oct 1 18:21:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 174922 Delivered-To: patches@linaro.org Received: by 2002:ac9:19ad:0:0:0:0:0 with SMTP id d45csp8483493oce; Tue, 1 Oct 2019 11:21:22 -0700 (PDT) X-Received: by 2002:a17:902:36e:: with SMTP id 101mr27696511pld.46.1569954082852; Tue, 01 Oct 2019 11:21:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569954082; cv=none; d=google.com; s=arc-20160816; b=HZWE5w2vV477+bBQZc9K3aE01heEHfgKLxXJAgtNmz9uTlc1E50GACAUd80bBveBkh 0TJnGVzdl0V/TRfN1X+BZ0CK7TB/kCNpzY5M5nknkQjazQHIq2BPwLRFpZP84f6ET0wW mSQ6SdSVPtU+9Zi2T19SjZ51doz4dsLvJ8sIcbPIoE6xSAWvrU60F2ro1AIg8OZqegFz bFSFIy4Fz7DE88/T4LUi/Yr1g9QvSLGp6fGg8Cs1UbpUYwzlR+sLVneSqT8lIpPCY+7/ +lMvbBMYLsQsltvrbnod0yX6iCRhEkSuFZhJfN4h0q00TTqgbZYWj75VUf6jYFnjfkJ+ CFXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:dkim-signature; bh=gndIBZtxkWWYIAzCuv66ix3JWZKnnzO2W2vxGiAxUeY=; b=rRWJ+kZCdQruJEwMhbijIP9ohSHXIUJqjMLJMhLJNR4+BPCDWFreNJmoLDRu2fwne1 jIWojWjb7l3fDy3+iV9sra76Ensxd3h2Wqdg4bRfBpw99XNkl8ojbtyGDIQl8brYtWdO W/DSwzyagEQaAjaIBpjloOZaPfcD1lyO5AKtr3aCKft9HZ2MBoLJLaH1Fwuw/9qElA/g /boVNVVWvu9wMjPRUBf+ptpfmbHvfkvQEJ7/dODMFrGCSmiIopzFgAYed9ZNoUSOTkE5 KtSin0yuGGJ3Vp7mUacd/uqjKBW9jq+etUcBjCXQ/hGdEHM8oCH7yKHGWuvjZnYG09Hj ACRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fLMsHHSk; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id g98sor4613869pje.12.2019.10.01.11.21.22 for (Google Transport Security); Tue, 01 Oct 2019 11:21:22 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fLMsHHSk; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=gndIBZtxkWWYIAzCuv66ix3JWZKnnzO2W2vxGiAxUeY=; b=fLMsHHSkJQboFI/k5HicWHXG9rpQ4fTqhj5TQzrFXS/42QyqM7KE9ZH3kDzuYKxyeA al4S5uKvNB/A4Qde3e4x/ER4T2MYRZA8vMlWtfIXIHA8hJmSwjUL3UOKjQ2Lm2Uevccs dh4SZgcSRrKXNHYgCRHqyD3sdac1+Cw8fyru6QzVWeakRwE0EFFfqbmn78ijiX5Zw0yl HgZziPyFCONM67zfgoLqarfVoDM3kDp6qL7o/NzDcjrUGxD/6u41XXp8xa4xgaGc0Flq KdevpQUe7Huvq5CkcHpoDhEEQoD6qCylNHEdoVWwoRbpwDG4gCxthpBYHHT5KpyOJxi3 RgoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=gndIBZtxkWWYIAzCuv66ix3JWZKnnzO2W2vxGiAxUeY=; b=KcstBJMGhAjlBc3CUyYFs5aPpQnNQHV1V9kedJewJw5PCD45GWjPWm2oHosGXabfBg vKxy4ISwglHMGhWiUMSGMJskJOHAdnSSBuqv884O9UOfbrnV0hHgEtip1O1DYNroIPDg ULtrSMSCwvooCiDBPaLBkYvGiUba/ePpZpOEd5YlV3/qO5e3Sr1fEcR/SzH4CGcjhe0R riYt+Fq4tIeI55lrw/xxnLlznVqkVYiFZ7d+v+W3RvCSbQ8q1PhoPIl0oXiyOHmx5t/8 7eXske0d5GY1iE4kqxSzY6SVeOL06fQrj42X03FAh/3COPf0qcWSbguZucUbZsPHytAn tk3g== X-Gm-Message-State: APjAAAV7fmT8xziAvd/hGfSGs0UynTNlgH8eYjEWIZblJbNNoXewPna1 Efb8sSQLBhKeotio4WD4U/TTq+kw X-Google-Smtp-Source: APXvYqwFrHFwrmB7SlH39LenzDjCzXbgqSF8QG9ob8+xV1BuJFN58Z4wzP1vqRL8k1G84YCxeyvy+Q== X-Received: by 2002:a17:90a:26e3:: with SMTP id m90mr7101175pje.57.1569954082118; Tue, 01 Oct 2019 11:21:22 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:680:1319:692:26ff:feda:3a81]) by smtp.gmail.com with ESMTPSA id i10sm15464221pfa.70.2019.10.01.11.21.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 11:21:21 -0700 (PDT) From: John Stultz To: lkml Cc: Peter Griffin , Philipp Zabel , Enrico Weigelt , John Stultz Subject: [PATCH] reset: hi6220: Add support for AO reset controller Date: Tue, 1 Oct 2019 18:21:14 +0000 Message-Id: <20191001182114.69699-1-john.stultz@linaro.org> X-Mailer: git-send-email 2.17.1 From: Peter Griffin This is required to bring Mali450 gpu out of reset. Cc: Philipp Zabel Cc: Peter Griffin Cc: Enrico Weigelt Signed-off-by: Peter Griffin Signed-off-by: John Stultz --- drivers/reset/hisilicon/hi6220_reset.c | 51 +++++++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c index 24e6d420b26b..d84674a2cead 100644 --- a/drivers/reset/hisilicon/hi6220_reset.c +++ b/drivers/reset/hisilicon/hi6220_reset.c @@ -33,6 +33,7 @@ enum hi6220_reset_ctrl_type { PERIPHERAL, MEDIA, + AO, }; struct hi6220_reset_data { @@ -92,6 +93,47 @@ static const struct reset_control_ops hi6220_media_reset_ops = { .deassert = hi6220_media_deassert, }; +#define AO_SCTRL_SC_PW_CLKEN0 0x800 +#define AO_SCTRL_SC_PW_CLKDIS0 0x804 + +#define AO_SCTRL_SC_PW_RSTEN0 0x810 +#define AO_SCTRL_SC_PW_RSTDIS0 0x814 + +#define AO_SCTRL_SC_PW_ISOEN0 0x820 +#define AO_SCTRL_SC_PW_ISODIS0 0x824 +#define AO_MAX_INDEX 12 + +static int hi6220_ao_assert(struct reset_controller_dev *rc_dev, + unsigned long idx) +{ + struct hi6220_reset_data *data = to_reset_data(rc_dev); + struct regmap *regmap = data->regmap; + int ret; + + ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTEN0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_ISOEN0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_CLKDIS0, BIT(idx)); + return ret; +} + +static int hi6220_ao_deassert(struct reset_controller_dev *rc_dev, + unsigned long idx) +{ + struct hi6220_reset_data *data = to_reset_data(rc_dev); + struct regmap *regmap = data->regmap; + int ret; + + ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTDIS0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_ISODIS0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_CLKEN0, BIT(idx)); + return ret; +} + +static const struct reset_control_ops hi6220_ao_reset_ops = { + .assert = hi6220_ao_assert, + .deassert = hi6220_ao_deassert, +}; + static int hi6220_reset_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -117,9 +159,12 @@ static int hi6220_reset_probe(struct platform_device *pdev) if (type == MEDIA) { data->rc_dev.ops = &hi6220_media_reset_ops; data->rc_dev.nr_resets = MEDIA_MAX_INDEX; - } else { + } else if (type == PERIPHERAL) { data->rc_dev.ops = &hi6220_peripheral_reset_ops; data->rc_dev.nr_resets = PERIPH_MAX_INDEX; + } else { + data->rc_dev.ops = &hi6220_ao_reset_ops; + data->rc_dev.nr_resets = AO_MAX_INDEX; } return reset_controller_register(&data->rc_dev); @@ -134,6 +179,10 @@ static const struct of_device_id hi6220_reset_match[] = { .compatible = "hisilicon,hi6220-mediactrl", .data = (void *)MEDIA, }, + { + .compatible = "hisilicon,hi6220-aoctrl", + .data = (void *)AO, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, hi6220_reset_match);