From patchwork Fri Sep 13 19:28:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Baluta X-Patchwork-Id: 173790 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp558736ilq; Fri, 13 Sep 2019 12:28:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqxY00JLMI1acuQVq0xxw+YhZt8AlF47X5AsBk2NqG6rAVRQ6qbggqSOAtb/ZdZWwcIDeGOS X-Received: by 2002:a17:906:8406:: with SMTP id n6mr10632517ejx.138.1568402900592; Fri, 13 Sep 2019 12:28:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568402900; cv=none; d=google.com; s=arc-20160816; b=yZX3hpssDZ9eOgM3wzin+pxH9R73zwMvECyB2jnbyOycBGXMkeKKY1vlPlUG+aCs/e CxYAg3J/l/gEEIFVmFLlg5vedi01BnTsl1jcN0dWILm6nVP+HRzhuxBe3UpR6AVfDvHI gBMfZM1ousmZZ39AD4axWtgzmZolZOQKIqtEPJ3Mq2eyOZij7QzykQ9GcagNkr+VtXHZ ffzWyDTJ5Ru7oBA3tRAxY6dmv3/WjlRrGhe9fZ+EHu4P1OwySlT0hYk83tPwjxm4YMcm bfB8omBvyCletEiXGFmWSfGCM5hjJerECsL8SRnLGjbFeQwsR4JPdXNtMfpnIB6kBFbe PHIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=E0OfHsxak/xMa+Fwwh8VZWchsiJ/dkS/JxH0RE0zjc8=; b=h41C3kMjAqndSP64OLEYYD1uh3cE/rZshU97H/0RcJUsUYFHCJ8NxVQWglEbvZWuDj 3lSRXKiNYF08DZq596QXZR2VRi7hSaQVzQVFH9bYRYzBsuxg4U0SIvYGt4Hb6ZWZiKqV At5IA9wqkYW4ApE+MPmaPIZahaFxebVhMzlyMLR0dgOWp9PXK+5gzFpC4OqtCcCN4V0+ f9OiD42sYomz7QqrRQeVuZYv8VsPfNFsKXYJUJAHh6kPJLtYpLnohyggPnfY7xytpaZk /bbiq509Od4f38C+Lo4OhSVgZiA4eDVkK+8x2BFVBr1Z13+kt/bgIvba1AoLnyCMV493 Wg0g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b9si7812474edj.0.2019.09.13.12.28.20; Fri, 13 Sep 2019 12:28:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730809AbfIMT2T (ORCPT + 27 others); Fri, 13 Sep 2019 15:28:19 -0400 Received: from inva020.nxp.com ([92.121.34.13]:41876 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729340AbfIMT2O (ORCPT ); Fri, 13 Sep 2019 15:28:14 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6482E1A073C; Fri, 13 Sep 2019 21:28:12 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5730D1A0352; Fri, 13 Sep 2019 21:28:12 +0200 (CEST) Received: from fsr-ub1864-103.ea.freescale.net (fsr-ub1864-103.ea.freescale.net [10.171.82.17]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id C9E43205DB; Fri, 13 Sep 2019 21:28:11 +0200 (CEST) From: Daniel Baluta To: broonie@kernel.org Cc: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Daniel Baluta , NXP Linux Team Subject: [PATCH v2 3/3] ASoC: fsl_sai: Fix TCSR.TE/RCSR.RE in synchronous mode Date: Fri, 13 Sep 2019 22:28:07 +0300 Message-Id: <20190913192807.8423-4-daniel.baluta@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190913192807.8423-1-daniel.baluta@nxp.com> References: <20190913192807.8423-1-daniel.baluta@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The SAI transmitter and receiver can be configured to operate with synchronous bit clock and frame sync. When Tx is synchronous with receiver RCSR.RE should be set in playback to enable the receiver which provides bit clock and frame sync. When Rx is synchronous with transmitter TCSR.TE should be set in record to enable the transmitter which provides bit clock and frame sync. Cc: NXP Linux Team Signed-off-by: Daniel Baluta --- Changes since v1: * new patch sound/soc/fsl/fsl_sai.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 6598a1ae0a2d..a59300e37549 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -539,8 +539,8 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, sai->synchronous[RX] ? FSL_SAI_CR2_SYNC : 0); /* - * It is recommended that the transmitter is the last enabled - * and the first disabled. + * it is recommended that the asynchronous block to be the last enabled + * and the first disabled */ switch (cmd) { case SNDRV_PCM_TRIGGER_START: @@ -549,9 +549,11 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE); - regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs), - FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE); - regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs), + if (sai->synchronous[tx]) + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(!tx, ofs), + FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE); + + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE); regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),