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[209.132.180.67]) by mx.google.com with ESMTP id x78si10176881pgx.471.2019.08.26.13.45.43; Mon, 26 Aug 2019 13:45:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lu16lKE1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731929AbfHZUpm (ORCPT + 28 others); Mon, 26 Aug 2019 16:45:42 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:55806 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730637AbfHZUpO (ORCPT ); Mon, 26 Aug 2019 16:45:14 -0400 Received: by mail-wm1-f66.google.com with SMTP id f72so785981wmf.5 for ; Mon, 26 Aug 2019 13:45:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9a/nmo4HleHfZCRi8ScPQm/5Ra82K05ffJZThzk2QTs=; b=lu16lKE1wbTcy6ZNuBOuRforM5MbT2Ne+jnJr2rCMLswpVp64GS5nb7iwRBo7I8c6M rX+O3u3ymVJkV9apnlC3ZI/cMWFyT9Rz7DEJJG9EzUyal8EppWDAr9sK1sD6wwDVhlVj XaOL2s+XnmCRx9ULx5G322klxXolV0bnJUOnMAiUtjUy3AqXOgljde2E0gh2eA03YngG bGxbow8Yj1Fx8zoJ7LmY5tiObI3fpgUivUiGxLdUwIsDRl3Z7Qe/n9UXvVb0NpY/ojOu +17bew2ZTM3RKOe1K6F5rfbLo4EACqJQM1I4MUBka47TkaOtmvHoHASXAjISRmbbwCmV 7nqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9a/nmo4HleHfZCRi8ScPQm/5Ra82K05ffJZThzk2QTs=; b=QdGzY/m372TQDO7zPmfio8cK7fPfER0qWjXXvM8lUFwXZKxLqQJ5DOQMkqyNcZ5t6/ GDOHHFVFWk2cawX6PEZWikxzDbb77UdTPBuzlgqg/hye/Ut319sYxwUOZUYMhBrcVs3n bDx7Ord+ZzzGRsSdk5Mfjm5SsaQvI/JSeNgML9x/RFpSyOgvB+XMnczkI5JhJw84mwzA mQltlvpc6hlX03oLXP4vTdh47dqPcdWMFLO4Nl2qa8OWb6rc2NNnepVuaMCIDDsc/ttK M8rzcxWHhnFvm+uNiFOoVUUmIY5jRCTDkVWrRne2JpTRP98LWzm+OjIwwgeAk7jVxxOV QmLw== X-Gm-Message-State: APjAAAUsFqkMitulOfpYLxT6DV4wQ17WOPI93+u0DWVNgb8/oXs0jDcm 0iYO/Ys57/jUZtJ+q98NSNsR7kG4aRU= X-Received: by 2002:a7b:cd17:: with SMTP id f23mr24509458wmj.177.1566852312285; Mon, 26 Aug 2019 13:45:12 -0700 (PDT) Received: from mai.imgcgcw.net ([2a01:e34:ed2f:f020:f881:f5ed:b15d:96ab]) by smtp.gmail.com with ESMTPSA id 20sm549557wmk.34.2019.08.26.13.45.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Aug 2019 13:45:11 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Magnus Damm , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH 14/20] dt-bindings: timer: renesas, cmt: Add CMT0234 to sh73a0 and r8a7740 Date: Mon, 26 Aug 2019 22:44:01 +0200 Message-Id: <20190826204407.17759-14-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190826204407.17759-1-daniel.lezcano@linaro.org> References: <20190826204407.17759-1-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Magnus Damm Document the on-chip CMT devices included in r8a7740 and sh73a0. Included in this patch is DT binding documentation for 32-bit CMTs CMT0, CMT2, CMT3 and CMT4. They all contain a single channel and are quite similar however some minor differences still exist: - "Counter input clock" (clock input and on-device divider) One example is that RCLK 1/1 is supported by CMT2, CMT3 and CMT4. - "Wakeup request" (supported by CMT0 and CMT2) Because of this one unique compat string per CMT device is selected. Signed-off-by: Magnus Damm Reviewed-by: Rob Herring Reviewed-by: Simon Horman Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index c5220bcd852b..45840d475050 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -22,6 +22,10 @@ Required Properties: - "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4. - "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4. + - "renesas,r8a7740-cmt0" for the 32-bit CMT0 device included in r8a7740. + - "renesas,r8a7740-cmt2" for the 32-bit CMT2 device included in r8a7740. + - "renesas,r8a7740-cmt3" for the 32-bit CMT3 device included in r8a7740. + - "renesas,r8a7740-cmt4" for the 32-bit CMT4 device included in r8a7740. - "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743. - "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743. - "renesas,r8a7744-cmt0" for the 32-bit CMT0 device included in r8a7744. @@ -54,6 +58,10 @@ Required Properties: - "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980. - "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990. - "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990. + - "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0. + - "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0. + - "renesas,sh73a0-cmt3" for the 32-bit CMT3 device included in sh73a0. + - "renesas,sh73a0-cmt4" for the 32-bit CMT4 device included in sh73a0. - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2 and RZ/G1.