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[213.112.60.36]) by smtp.gmail.com with ESMTPSA id l22sm9910671ljc.4.2019.07.26.04.27.20 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 26 Jul 2019 04:27:20 -0700 (PDT) From: Anders Roxell To: will@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Anders Roxell , stable@vger.kernel.org Subject: [PATCH 1/3] arm64: perf: Mark expected switch fall-through Date: Fri, 26 Jul 2019 13:27:16 +0200 Message-Id: <20190726112716.19104-1-anders.roxell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When fall-through warnings was enabled by default, commit d93512ef0f0e ("Makefile: Globally enable fall-through warning"), the following warnings was starting to show up: ../arch/arm64/kernel/hw_breakpoint.c: In function ‘hw_breakpoint_arch_parse’: ../arch/arm64/kernel/hw_breakpoint.c:540:7: warning: this statement may fall through [-Wimplicit-fallthrough=] if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) ^ ../arch/arm64/kernel/hw_breakpoint.c:542:3: note: here case 2: ^~~~ ../arch/arm64/kernel/hw_breakpoint.c:544:7: warning: this statement may fall through [-Wimplicit-fallthrough=] if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) ^ ../arch/arm64/kernel/hw_breakpoint.c:546:3: note: here default: ^~~~~~~ Rework so that the compiler doesn't warn about fall-through. Rework so the code looks like the arm code. Since the comment in the function indicates taht this is supposed to behave the same way as arm32 because it handles 32-bit tasks also. Cc: stable@vger.kernel.org # v3.16+ Fixes: 6ee33c2712fc ("ARM: hw_breakpoint: correct and simplify alignment fixup code") Signed-off-by: Anders Roxell --- arch/arm64/kernel/hw_breakpoint.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) -- 2.20.1 diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index dceb84520948..ea616adf1cf1 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -535,14 +535,17 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, case 0: /* Aligned */ break; - case 1: - /* Allow single byte watchpoint. */ - if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) - break; case 2: /* Allow halfword watchpoints and breakpoints. */ if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) break; + /* Fall through */ + case 1: + case 3: + /* Allow single byte watchpoint. */ + if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) + break; + /* Fall through */ default: return -EINVAL; }