From patchwork Thu Jun 20 13:06:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 167329 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2048824ilk; Thu, 20 Jun 2019 06:06:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqzck7BmPEIFvY9PKouuHg7vAbQPLGKbn+3E8OSQz2Fai6hTzrwV6w3smr9hu+pQp3KItszT X-Received: by 2002:a63:601:: with SMTP id 1mr66343pgg.380.1561036000786; Thu, 20 Jun 2019 06:06:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561036000; cv=none; d=google.com; s=arc-20160816; b=qjZdnfXgT9OEopTZkDdgLgHiw4DBSeJMh4n4UXZ4vj2MTz8vzwZyBKeJAP2nkmMp9K z+bpWeREwN/LrgDrSzbXrbyC/26qFxwmpaOtQYCvQjLZRFfyxM+QdiYR6Dr2xkvX3FcE qL/H1skj12NT9hH8m465P5pSruHL3t3UqtQ/rVtOOVh80LRz111tbAaNfrA3CJDzpssm nrnEM7Ix0RokAdrk8m1QeWNDxNHIzKSyP+8ZA5IyLjJN9OOvPgdeSYFGrxvVDJK2pb9Z 1x8wO2uog9I9MwRaoYb+z8ckJxXHGmG2XPutlKcVi8JHpnPVc1oGPGXIkq2LYMAnN7mI GLLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=gmFwqVe3ITc9+AfFXvEg61X9WWbmijEw8bWWrYsWHss=; b=ki8hD4QgfqNOS3SVjpcUC9uj6LHfW/MySCB9vRjvuEqKgOZttUZbX9EcC1pAKj5y9A rdOdxzYF8t7BfBfNIFIj5hp/Z+CUSg3tJ1M3G69pr/MFAYfOJH60wUxCIIZusaWNE7Nk C23L8OmET/QoK/Kcs8BIytxC2GFjAiLRLPsmYnnnQBPTDUdJxX6EtPid+issjHsd1bpB YQ+lrEmnVa7TwoaMBXbSduWzPPvl9ZHPSvqLbS2niKQvN/hTtPjI0nuwBXeNCzqUz4WQ vztRV/dFeQrvPudBum6t/EuDY/hOhX6vwQ7iOd4SxDoe50X5G6+40NaoMP17cRhQFUIg cUxA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s29si5722550pgn.5.2019.06.20.06.06.40; Thu, 20 Jun 2019 06:06:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732032AbfFTNGj (ORCPT + 30 others); Thu, 20 Jun 2019 09:06:39 -0400 Received: from foss.arm.com ([217.140.110.172]:36790 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731831AbfFTNGg (ORCPT ); Thu, 20 Jun 2019 09:06:36 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6D65F360; Thu, 20 Jun 2019 06:06:35 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 18A843F73F; Thu, 20 Jun 2019 06:06:33 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Cc: james.morse@arm.com, marc.zyngier@arm.com, julien.thierry@arm.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Grall Subject: [RFC v2 08/14] arm64/mm: Split asid_inits in 2 parts Date: Thu, 20 Jun 2019 14:06:02 +0100 Message-Id: <20190620130608.17230-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190620130608.17230-1-julien.grall@arm.com> References: <20190620130608.17230-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move out the common initialization of the ASID allocator in a separate function. Signed-off-by: Julien Grall --- arch/arm64/mm/context.c | 43 +++++++++++++++++++++++++++++++------------ 1 file changed, 31 insertions(+), 12 deletions(-) -- 2.11.0 diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index beba8e5b4100..81bc3d365436 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -271,31 +271,50 @@ asmlinkage void post_ttbr_update_workaround(void) CONFIG_CAVIUM_ERRATUM_27456)); } -static int asids_init(void) +/* + * Initialize the ASID allocator + * + * @info: Pointer to the asid allocator structure + * @bits: Number of ASIDs available + * @asid_per_ctxt: Number of ASIDs to allocate per-context. ASIDs are + * allocated contiguously for a given context. This value should be a power of + * 2. + */ +static int asid_allocator_init(struct asid_info *info, + u32 bits, unsigned int asid_per_ctxt) { - struct asid_info *info = &asid_info; - - info->bits = get_cpu_asid_bits(); - info->ctxt_shift = ilog2(ASID_PER_CONTEXT); + info->bits = bits; + info->ctxt_shift = ilog2(asid_per_ctxt); /* * Expect allocation after rollover to fail if we don't have at least - * one more ASID than CPUs. ASID #0 is reserved for init_mm. + * one more ASID than CPUs. ASID #0 is always reserved. */ WARN_ON(NUM_CTXT_ASIDS(info) - 1 <= num_possible_cpus()); atomic64_set(&info->generation, ASID_FIRST_VERSION(info)); info->map = kcalloc(BITS_TO_LONGS(NUM_CTXT_ASIDS(info)), sizeof(*info->map), GFP_KERNEL); if (!info->map) - panic("Failed to allocate bitmap for %lu ASIDs\n", - NUM_CTXT_ASIDS(info)); - - info->active = &active_asids; - info->reserved = &reserved_asids; + return -ENOMEM; raw_spin_lock_init(&info->lock); + return 0; +} + +static int asids_init(void) +{ + u32 bits = get_cpu_asid_bits(); + + if (!asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT)) + panic("Unable to initialize ASID allocator for %lu ASIDs\n", + 1UL << bits); + + asid_info.active = &active_asids; + asid_info.reserved = &reserved_asids; + pr_info("ASID allocator initialised with %lu entries\n", - NUM_CTXT_ASIDS(info)); + NUM_CTXT_ASIDS(&asid_info)); + return 0; } early_initcall(asids_init);