diff mbox series

[6/6] phy: tegra: xusb: Add Tegra210 PLL power supplies

Message ID 20190612102803.25398-7-kishon@ti.com
State Accepted
Commit e3888cda394c72dcfd450afec1121d9777a59805
Headers show
Series [1/6] phy: qcom-qusb2: fix missing assignment of ret when calling clk_prepare_enable | expand

Commit Message

Kishon Vijay Abraham I June 12, 2019, 10:28 a.m. UTC 
From: Thierry Reding <treding@nvidia.com>


The Tegra210 SoC has four inputs that consume power in order to supply
the PLLs that drive the various USB, PCI and SATA pads.

Signed-off-by: Thierry Reding <treding@nvidia.com>

Acked-by: Jon Hunter <jonathanh@nvidia.com>

Tested-by: Jon Hunter <jonathanh@nvidia.com>

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

---
 drivers/phy/tegra/xusb-tegra210.c | 9 +++++++++
 1 file changed, 9 insertions(+)

-- 
2.17.1
diff mbox series

Patch

diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c
index 05bee32a3a4d..eb754baa8d71 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -2017,6 +2017,13 @@  static const struct tegra_xusb_padctl_ops tegra210_xusb_padctl_ops = {
 	.hsic_set_idle = tegra210_hsic_set_idle,
 };
 
+static const char * const tegra210_xusb_padctl_supply_names[] = {
+	"avdd-pll-utmip",
+	"avdd-pll-uerefe",
+	"dvdd-pex-pll",
+	"hvdd-pex-pll-e",
+};
+
 const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc = {
 	.num_pads = ARRAY_SIZE(tegra210_pads),
 	.pads = tegra210_pads,
@@ -2035,6 +2042,8 @@  const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc = {
 		},
 	},
 	.ops = &tegra210_xusb_padctl_ops,
+	.supply_names = tegra210_xusb_padctl_supply_names,
+	.num_supplies = ARRAY_SIZE(tegra210_xusb_padctl_supply_names),
 };
 EXPORT_SYMBOL_GPL(tegra210_xusb_padctl_soc);