From patchwork Thu May 9 11:10:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 163700 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp818309ilr; Thu, 9 May 2019 04:11:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqzzu9hcGynJ5zBCsg8bsPqD6Oh6FXjGaA5x1Mv7shM8UYqOVOauz/Km8wf6Q8xH4dTfkI3o X-Received: by 2002:a63:f707:: with SMTP id x7mr4490800pgh.343.1557400292202; Thu, 09 May 2019 04:11:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557400292; cv=none; d=google.com; s=arc-20160816; b=aqaFIBzw+dVh0IMsQDjKgp8lsUqhHUFbfilK5dRjZ7PLMgcfZqSmb0aAoWsA5aPlcm YaD3QG3nQZL+at4hltA9tJDm4MpnAzrBcetnwuAYOsdb6SxnVkLFa9PSwau9FtjwOUMg P73PFDDQp4t/iD++Cw59wcysuxEdoLyvV77CA3NC1jV1hp9eWdelre0mxXfalmGrNdB5 qRZvAefzJL+q4YulVB/E+eZMXkX6cW5VIFNLLNCu4DFqZrLSdaVsVjY0wSnDotQGq/7E KE+khOftWENwMP5pyKYAimswRHbOHyAhMqu0wqQ+aa7kiieOxv1t7PQEMdHSJnYDjWWi 9CoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=btyjrIBgvEiFaw+UeR2po3KmpV02gWF8Za6NMh5yZW4=; b=R35hfB1CFBDN9TWtEHaR0I9M8SXH12WnT0off+Zp718hU4pbh6rqyDa2BLQO06hEWy 5DH2B0fjjmUjblSywl9M3BeF6QOpzTbss3NvO65hdvQXnlpZonVxwojDoGYj0qjJPFS2 jdX8YhdLyT4GoLF3qUp2ULXTSqdpinnlh+HohFl7dpO8+oIaYb0mxfsrpasrWxyMEryJ mcKjHZhEnQZeIAXPWGVJ1ley29i++MKVy201IO9lH7n0g4UWh3MykHi6vElzZqkyZ9ff gYLjZDeB9fLSOZ2Ty+Jvj1dU/+DEqMN89kmHXeqG8Z2q1ZdGLN14pr1PA3ufqQhHSG4T DuiQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PWBiTlpp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r3si2370980pfn.139.2019.05.09.04.11.31; Thu, 09 May 2019 04:11:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PWBiTlpp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726491AbfEILLa (ORCPT + 30 others); Thu, 9 May 2019 07:11:30 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:43372 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725869AbfEILL3 (ORCPT ); Thu, 9 May 2019 07:11:29 -0400 Received: by mail-wr1-f67.google.com with SMTP id r4so2439269wro.10 for ; Thu, 09 May 2019 04:11:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=btyjrIBgvEiFaw+UeR2po3KmpV02gWF8Za6NMh5yZW4=; b=PWBiTlppp3qNKNSeeS/VbeyXHbeoNzIgZOkqg0QoiRFGQ/PoyWUhxKj3BLPDmz8W6Y JzXPTH5kOri0av4o3+l7pnSkszbh2LqCnIXf4oU7wWhWtha3iWEYL7mQP6CFGfFbTFGr KOuc7K4lgMulVZGUEawzuC5yZkFF4RwYXvm9sF2F08eXrBZgq9NOsUh0frqjNdNgmn9X OYWoNik+J4XJ2wimnmZN/CyFgZHo3ggmQHf9szz/AttkvE0AwkumSzIT5DMZ9lacacVu AGRDb0WGfRrkeIcK07euzHhF1/GjcTl/yHabhuTGJRx+PkjlxWuUAdoFN7KiZeFFph6z W3CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=btyjrIBgvEiFaw+UeR2po3KmpV02gWF8Za6NMh5yZW4=; b=GPUE8hu3VAzVblW4CVTuOdYBeB3E5x1mvgT2er7cVBsUdU0V4PzB+yaE6dczDSLZcN iEX61+ToF9n/GmoHNMhBD5xrkxoZtJqDOTrrhjvwSf4HoTqVEGHYj3eMhAuYGOboZZ6x OhIBC2GDWinG3/CKjHq4vaQ2HmWUdProbUqrpEcoWOQRcVB/ukQu1rBr7pDH0ym8yTHu 7iY905cikIuJBIebwmV/kh19yWWXfpH7Ckrh5QmoBGDDIkQbDhzK4ovfAWBLoMxT+Q1B O3bUaQhzWdYANlFhK601jlx7dqPdw/h3mnQpxZALT6dxUdt9oWRKxu8mqDPn2v7rQXwr M8Ig== X-Gm-Message-State: APjAAAU4hXR7zSqY8rdhkQJtzOSdwS7jxjukv3DQ6YOSmOpHd7lNXI05 wS3keGsygLlWsRiPnbFJba3wZQ== X-Received: by 2002:a5d:4648:: with SMTP id j8mr2745726wrs.53.1557400287888; Thu, 09 May 2019 04:11:27 -0700 (PDT) Received: from mai.irit.fr ([141.115.39.235]) by smtp.gmail.com with ESMTPSA id z7sm2299778wme.26.2019.05.09.04.11.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 04:11:26 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Mesih Kilinc , Maxime Ripard , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Allwinner sunXi SoC support) Subject: [PATCH 01/15] clocksource/drivers/sun4i: Add a compatible for suniv Date: Thu, 9 May 2019 13:10:34 +0200 Message-Id: <20190509111048.11151-1-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <7e786ba3-a664-8fd9-dd17-6a5be996a712@linaro.org> References: <7e786ba3-a664-8fd9-dd17-6a5be996a712@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mesih Kilinc The suniv (new F-series) chip has a timer with less functionality than the A10 timer, e.g. it has only 3 channels. Add a new compatible for it. As we didn't use the extra channels on A10 either now, the code needn't to be changed. The suniv chip is based on ARM926EJ-S CPU, thus it has no architecture timer. Register sun4i_timer as sched_clock on it. Signed-off-by: Mesih Kilinc Acked-by: Maxime Ripard Acked-by: Daniel Lezcano Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-sun4i.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/clocksource/timer-sun4i.c b/drivers/clocksource/timer-sun4i.c index 6e0180aaf784..65f38f6ca714 100644 --- a/drivers/clocksource/timer-sun4i.c +++ b/drivers/clocksource/timer-sun4i.c @@ -186,7 +186,8 @@ static int __init sun4i_timer_init(struct device_node *node) */ if (of_machine_is_compatible("allwinner,sun4i-a10") || of_machine_is_compatible("allwinner,sun5i-a13") || - of_machine_is_compatible("allwinner,sun5i-a10s")) + of_machine_is_compatible("allwinner,sun5i-a10s") || + of_machine_is_compatible("allwinner,suniv-f1c100s")) sched_clock_register(sun4i_timer_sched_read, 32, timer_of_rate(&to)); @@ -218,3 +219,5 @@ static int __init sun4i_timer_init(struct device_node *node) } TIMER_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer", sun4i_timer_init); +TIMER_OF_DECLARE(suniv, "allwinner,suniv-f1c100s-timer", + sun4i_timer_init);