From patchwork Wed May 1 13:58:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163214 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554508ill; Wed, 1 May 2019 06:58:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqwx6SR6G21WkjzvBxouAPR6ZoaYJvKmjKhq7onreYmPQVGZhhDz3vkPa3ITCU8Fs2rHIAdG X-Received: by 2002:a63:2b03:: with SMTP id r3mr72576515pgr.105.1556719123106; Wed, 01 May 2019 06:58:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556719123; cv=none; d=google.com; s=arc-20160816; b=jfOeSGi+oBa5vf2XmAKXpV3PxdUd9ezWP4Oh9HYSOmcS3xXm31Ef/en9VYL1kWKNCh AAFHur8grgtnQZBudLbwiootigm+gfj27cDYdSPCKMi9lYtLpixdzbRiHI4sIwU78WsB Bf9CpS6unbRz44TMoHKWQwDGrVS9DM/PD8rW5zJ/g5JgQOH7kQ6dDTvVN885h/ZGghPX lmYE6n4CpQpAyaQ4kyPCtQVMEUKOBf2lA8DBlIBAt4G38ET8fv7ql5h1NBacC1EVRYtU 8wR3el/aoWRmc14pLUVwD0jCaKWdxYOKVJ1KQ9oA2GWUZvJAEaeT8jhmpT8zDVMz/egX zCvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=UE3R0bqJPKC1ooBa14iyFi/RRTLXYg8/O3fIBDG6sag=; b=DJuqW1u4jmeBW9qm6kEA2AuD2HZaUt1prZ3c6XIlUX25v+F1wPDkS1/mYAgLYLOT+D aJ9eGK12W2SjnsL2MsYHkij27z6NodO7VkJsXTWguBIrN2Vm4aCZT8swRVTnXlowy+cL gb+2XPa7CZSSwEVTFIcnD3EL63y50wKXHtQUOXlR+jFMI9VmQRjguPtdSCiqxq1gC7iB DBwDF83auUTZXAD6FGP5PrjSkm9ixlCfOteHWBQCmh4fGDR10Cr1jHFFHrrZInEM92Pb adjRrQKoAGMajo962Bb1lK56NMiguj0GidHd8OMLdDRh5Y2afTLtI7Pr2+hV/kU43Oa6 hCmA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id gn14si40588495plb.7.2019.05.01.06.58.42; Wed, 01 May 2019 06:58:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726620AbfEAN6l (ORCPT + 30 others); Wed, 1 May 2019 09:58:41 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59632 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726382AbfEAN6i (ORCPT ); Wed, 1 May 2019 09:58:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 50277EBD; Wed, 1 May 2019 06:58:38 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D117B3F5AF; Wed, 1 May 2019 06:58:35 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall , Eric Auger Subject: [PATCH v3 1/7] genirq/msi: Add a new field in msi_desc to store an IOMMU cookie Date: Wed, 1 May 2019 14:58:18 +0100 Message-Id: <20190501135824.25586-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When an MSI doorbell is located downstream of an IOMMU, it is required to swizzle the physical address with an appropriately-mapped IOVA for any device attached to one of our DMA ops domain. At the moment, the allocation of the mapping may be done when composing the message. However, the composing may be done in non-preemtible context while the allocation requires to be called from preemptible context. A follow-up change will split the current logic in two functions requiring to keep an IOMMU cookie per MSI. A new field is introduced in msi_desc to store an IOMMU cookie. As the cookie may not be required in some configuration, the field is protected under a new config CONFIG_IRQ_MSI_IOMMU. A pair of helpers has also been introduced to access the field. Signed-off-by: Julien Grall Reviewed-by: Robin Murphy Reviewed-by: Eric Auger --- Changes in v3: - Add Robin's and Eric's reviewed-by Changes in v2: - Update the commit message to use imperative mood - Protect the field with a new config that will be selected by IOMMU_DMA later on - Add a set of helpers to access the new field --- include/linux/msi.h | 26 ++++++++++++++++++++++++++ kernel/irq/Kconfig | 3 +++ 2 files changed, 29 insertions(+) -- 2.11.0 diff --git a/include/linux/msi.h b/include/linux/msi.h index 7e9b81c3b50d..82a308c19222 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -77,6 +77,9 @@ struct msi_desc { struct device *dev; struct msi_msg msg; struct irq_affinity_desc *affinity; +#ifdef CONFIG_IRQ_MSI_IOMMU + const void *iommu_cookie; +#endif union { /* PCI MSI/X specific data */ @@ -119,6 +122,29 @@ struct msi_desc { #define for_each_msi_entry_safe(desc, tmp, dev) \ list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list) +#ifdef CONFIG_IRQ_MSI_IOMMU +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return desc->iommu_cookie; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ + desc->iommu_cookie = iommu_cookie; +} +#else +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return NULL; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ +} +#endif + #ifdef CONFIG_PCI_MSI #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) #define for_each_pci_msi_entry(desc, pdev) \ diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig index 5f3e2baefca9..8fee06625c37 100644 --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -91,6 +91,9 @@ config GENERIC_MSI_IRQ_DOMAIN select IRQ_DOMAIN_HIERARCHY select GENERIC_MSI_IRQ +config IRQ_MSI_IOMMU + bool + config HANDLE_DOMAIN_IRQ bool