From patchwork Tue Apr 30 11:38:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 163113 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp3140042ill; Tue, 30 Apr 2019 05:08:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqy6zdqLZaCzl8A5dM0CPxhr/1Bzq2qdiP3M2i3Zwr1PGCZrKuSBkYK30RvOfGC82WDCm+7y X-Received: by 2002:a65:5003:: with SMTP id f3mr66219528pgo.29.1556626128011; Tue, 30 Apr 2019 05:08:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556626128; cv=none; d=google.com; s=arc-20160816; b=BbTMfESXG86L8S10XCBG5vONjNzikr7B+rQ5HxgpQsjQpXvBIBZY5eJunkfsf49Q7t 0WFZ1krigssr9rgjSW7P2vG33XsA9aia0g2cDqgMkeqOy6QyGO2hfc5ROKhhqrzmW51G 4tlbawnmZkyjqdJ/0FGzpjBAcMGAEZbPU7LJNpTaJE0zuiLI7KFS6z2/r6n0W1v//AeQ 5y+xSwRO+yXVzTVF5apQzvFvNA2+3g7SO7gqpPFKnu0j+MjGu/Dt70QeowaR1e9xKwJd dW/hevAp7wzBUPG966rJglTlAZDCEmqgCiWF1UpB3k16Vl7OYHbObOIM/y3h9FDRjN5n vtRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=PIVIOxpZQ61OcmITeusjoLx+AoueMDoLfT9HdocUdyw=; b=Kv5UiLl073c7FVO3ss3OPhdEzkJRh6UnP/2us4mFw9x7rTs1b5HImhDdB86DKkx2rr qYMvgJTGOT1ijIiUS2A1Qzudtd0G38ZhBdno6W7rIPHZy9SV9wrxYHiIsHetXlTs2WaG CvCxSW2h+FFx3A/sWluf2GjPI0sSMKImnbomY0Bdd6mXjg1pgaxw69hAPhtcuU5E/TgG qXU+LeBnUy10NhriVSP4MT/DVjRwoA14KoOePVHpstGspZZnHbdkysumZ1IxM3AooP1D ZFxI5NV8gWjbzcmLQ0l9hVE6SgtDNwGJwkHmwIxf2/G4BTfBZ1ztH+UAfxm3v6DPzi65 uT+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=wz8gGnG4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i1si9426316pfa.61.2019.04.30.05.08.47; Tue, 30 Apr 2019 05:08:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=wz8gGnG4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728024AbfD3Ljr (ORCPT + 30 others); Tue, 30 Apr 2019 07:39:47 -0400 Received: from mail.kernel.org ([198.145.29.99]:45252 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727936AbfD3Ljm (ORCPT ); Tue, 30 Apr 2019 07:39:42 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9C6C12173E; Tue, 30 Apr 2019 11:39:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1556624382; bh=OSovCw99t+fe1qPIzosQ6np7feDDRH7Hul/2hG9iB5s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wz8gGnG4JvrWT4/9mc7gJJlb5n0EqYHgnrb07KF/DauJHdHQX8byCWJESb06sjszz 1gU7hwhWb78newtyG61+yJY/dFHIura7SFh4zY/yXorqs4IiZb11b6N+jh8NJsKL2d fTMc9Z1ydoeIADzB6EaBKRleb4S4Oftcjehff69U= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Marc Zyngier , Ard Biesheuvel , Russell King Subject: [PATCH 4.9 14/41] ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache Date: Tue, 30 Apr 2019 13:38:25 +0200 Message-Id: <20190430113528.465419917@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190430113524.451237916@linuxfoundation.org> References: <20190430113524.451237916@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ard Biesheuvel commit e17b1af96b2afc38e684aa2f1033387e2ed10029 upstream. The EFI stub is entered with the caches and MMU enabled by the firmware, and once the stub is ready to hand over to the decompressor, we clean and disable the caches. The cache clean routines use CP15 barrier instructions, which can be disabled via SCTLR. Normally, when using the provided cache handling routines to enable the caches and MMU, this bit is enabled as well. However, but since we entered the stub with the caches already enabled, this routine is not executed before we call the cache clean routines, resulting in undefined instruction exceptions if the firmware never enabled this bit. So set the bit explicitly in the EFI entry code, but do so in a way that guarantees that the resulting code can still run on v6 cores as well (which are guaranteed to have CP15 barriers enabled) Cc: # v4.9+ Acked-by: Marc Zyngier Signed-off-by: Ard Biesheuvel Signed-off-by: Russell King Signed-off-by: Greg Kroah-Hartman --- arch/arm/boot/compressed/head.S | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -1383,7 +1383,21 @@ ENTRY(efi_stub_entry) @ Preserve return value of efi_entry() in r4 mov r4, r0 - bl cache_clean_flush + + @ our cache maintenance code relies on CP15 barrier instructions + @ but since we arrived here with the MMU and caches configured + @ by UEFI, we must check that the CP15BEN bit is set in SCTLR. + @ Note that this bit is RAO/WI on v6 and earlier, so the ISB in + @ the enable path will be executed on v7+ only. + mrc p15, 0, r1, c1, c0, 0 @ read SCTLR + tst r1, #(1 << 5) @ CP15BEN bit set? + bne 0f + orr r1, r1, #(1 << 5) @ CP15 barrier instructions + mcr p15, 0, r1, c1, c0, 0 @ write SCTLR + ARM( .inst 0xf57ff06f @ v7+ isb ) + THUMB( isb ) + +0: bl cache_clean_flush bl cache_off @ Set parameters for booting zImage according to boot protocol