From patchwork Thu Apr 25 19:52:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 162882 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp2363872jan; Thu, 25 Apr 2019 12:55:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqxIuXDvWPNNfSUn6VEI7qOlsdi0G9SssuYxbqexGTT002nAUKvGHsYWYnUPvgRyYpslfgfe X-Received: by 2002:a17:902:4a0c:: with SMTP id w12mr24491239pld.52.1556222117975; Thu, 25 Apr 2019 12:55:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556222117; cv=none; d=google.com; s=arc-20160816; b=a4xHDCbth55SXXKhhrJPaF4Zja4AyQPJ05OiBIHkPWrCbX1md4OCE1+RgJUxp1wKvm pY1/Yhetv0432HzmjSRsj63QpYz355u2+6aloOexordVEvYeX7GsXYMUziZeHfCBm+Xx b5kVUYBicmKL9lrp7i+4Zg/9MRBMwb4RYH2fsKKcaRw0/3DD9TtqD4Hm4TRunHKbmvk0 IFnCQ7BmQgNag8qm3Vch3jXrY4WKos5evub9RowwDLazdDOWlby3ZNaSYHuMvdBtCkzl FJBKRQ0R4wOvV3ccSsNypqJsdcUE/88wJwjpbuaeIfE8GL8GdHXx0YNCR0zvBLPPRIWg PRkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=YusN59c3iVe7dOG1Akfa6gDWfbXRGUq+MaL1LI2ES48=; b=jCixX9WZAexpTFuROQb2vvkqipdSPTu6RUPzQCGa4YFhP7q6269ayv/7S0aN4MEd5l NhgSZv2pAuzUYeaVo6XnRZ5IKzpXKf/DlOVMC8uXiEDnr+Aj/OxpeCeJzfqD6/1QWKf9 Vx9cKkszxR4k8bo1fTtO86YNdEVkNDnQ42q2UwpLI2XGT1RmPU/NImBAIgkEf6F+uqi8 RSLi90jpdAWCYzA7bBddTh3ktsdR1JzB8csIRLJi+O8IhAcGtaHCsFc/DngCsXUCXIE1 KZiaOrRkTRHcd9X5xPDaepE9Ss+NNJJ6CvkdJgflLHx3oXrHxSjZKLibLMJmYTKd7tVG T1Iw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="TPX0i/At"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o23si21678847pgv.540.2019.04.25.12.55.17; Thu, 25 Apr 2019 12:55:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="TPX0i/At"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387931AbfDYTzQ (ORCPT + 30 others); Thu, 25 Apr 2019 15:55:16 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:36715 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387747AbfDYTxb (ORCPT ); Thu, 25 Apr 2019 15:53:31 -0400 Received: by mail-pl1-f195.google.com with SMTP id ck15so318784plb.3 for ; Thu, 25 Apr 2019 12:53:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YusN59c3iVe7dOG1Akfa6gDWfbXRGUq+MaL1LI2ES48=; b=TPX0i/AtQIbWmNklm28vIvGzjPNLKhyboNWsooFfdW6iiPt6HNxr4YrcfRxQ7nbLe/ O2UffuRzv7I+S/loo/zBlQREV+9ONd17mz9GO4g9aoJG0w/77IqD8bAvXFgQnb1r+X8J p+QcGCur0l79hGH4LaAs30eMx51tUObMBuDPfB1Zn4XUOwVWIydnG0Wi/PkfHh/27B8K MEzUlP2iIXZ1cy7bmTizRqA+D8s6Q6Hbyngr6J+Mc9JT0SgNrJWwKNIkE/9dxdOUkW+G XBMAqCko2Df6B6tFw6/ze1+eWfCdhqWjXMFWHxVMMN3ekV7tn12wT8aqPkP45k2ga1bk eEhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YusN59c3iVe7dOG1Akfa6gDWfbXRGUq+MaL1LI2ES48=; b=cX193MGkff4S6c3ilmsp8TNoBJQWlHBl/snmG+UbwEdTgBOwfjCheT3BwpFi9dyoB9 geBQ3ioH6dsJG0mbCL6xB4PQfMdjrskDQoeF66TTKhXdSdaQElGzr5nIA/nhUt8r7sgJ mlabN2rehdTJrSDEIIhcOShUP0/X+DwPhgZJ2FwGqXEu2fSQCKo0a1iAtE+O8/E1puhO YQT3jX++rQSLfkJrLz9f9GlXM53Jx/DK2Z6MlVmbh1x+ncALhhyCKn1AffGvA3qWvNlf ZPNggpRTd6hdbwRAi/c70Iht34cJ2wcmD0dV25QqIPO4NlEQmG4VyKy9moEDXtNQVyGz O+9Q== X-Gm-Message-State: APjAAAVeG07zS2sG39d6fNTRDiUBwjTpGMwnDPDz1CCJzorxvWZENex1 iu9BJK6Lmxv3tIWB1DgYXJMqLQ== X-Received: by 2002:a17:902:7b97:: with SMTP id w23mr33285271pll.335.1556222010532; Thu, 25 Apr 2019 12:53:30 -0700 (PDT) Received: from xps15.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [68.147.8.254]) by smtp.gmail.com with ESMTPSA id t64sm47261961pfa.86.2019.04.25.12.53.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Apr 2019 12:53:29 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/32] coresight: etm4x: Add kernel configuration for CONTEXTID Date: Thu, 25 Apr 2019 13:52:52 -0600 Message-Id: <20190425195310.31562-15-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190425195310.31562-1-mathieu.poirier@linaro.org> References: <20190425195310.31562-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Set the proper bit in the configuration register when contextID tracing has been requested by user space. That way PE_CONTEXT elements are generated by the tracers when a process is installed on a CPU. Signed-off-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose Tested-by: Leo Yan Tested-by: Robert Walker --- drivers/hwtracing/coresight/Kconfig | 1 + drivers/hwtracing/coresight/coresight-etm-perf.c | 2 ++ drivers/hwtracing/coresight/coresight-etm4x.c | 5 +++++ include/linux/coresight-pmu.h | 2 ++ tools/include/linux/coresight-pmu.h | 2 ++ 5 files changed, 12 insertions(+) -- 2.17.1 diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index a40d796f0a4b..18e8d03321d6 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -75,6 +75,7 @@ config CORESIGHT_SOURCE_ETM4X bool "CoreSight Embedded Trace Macrocell 4.x driver" depends on ARM64 select CORESIGHT_LINKS_AND_SINKS + select PID_IN_CONTEXTIDR help This driver provides support for the ETM4.x tracer module, tracing the instructions that a processor is executing. This is primarily useful diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 25ae56e924bb..bbfed70b3402 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -29,6 +29,7 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src); /* ETMv3.5/PTM's ETMCR is 'config' */ PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC)); +PMU_FORMAT_ATTR(contextid, "config:" __stringify(ETM_OPT_CTXTID)); PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS)); PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK)); /* Sink ID - same for all ETMs */ @@ -36,6 +37,7 @@ PMU_FORMAT_ATTR(sinkid, "config2:0-31"); static struct attribute *etm_config_formats_attr[] = { &format_attr_cycacc.attr, + &format_attr_contextid.attr, &format_attr_timestamp.attr, &format_attr_retstack.attr, &format_attr_sinkid.attr, diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 08ce37c9475d..732ae12fca9b 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -239,6 +239,11 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata, if (attr->config & BIT(ETM_OPT_TS)) /* bit[11], Global timestamp tracing bit */ config->cfg |= BIT(11); + + if (attr->config & BIT(ETM_OPT_CTXTID)) + /* bit[6], Context ID tracing bit */ + config->cfg |= BIT(ETM4_CFG_BIT_CTXTID); + /* return stack - enable if selected and supported */ if ((attr->config & BIT(ETM_OPT_RETSTK)) && drvdata->retstack) /* bit[12], Return stack enable bit */ diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index a1a959ba24ff..b0e35eec6499 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -12,11 +12,13 @@ /* ETMv3.5/PTM's ETMCR config bit */ #define ETM_OPT_CYCACC 12 +#define ETM_OPT_CTXTID 14 #define ETM_OPT_TS 28 #define ETM_OPT_RETSTK 29 /* ETMv4 CONFIGR programming bits for the ETM OPTs */ #define ETM4_CFG_BIT_CYCACC 4 +#define ETM4_CFG_BIT_CTXTID 6 #define ETM4_CFG_BIT_TS 11 #define ETM4_CFG_BIT_RETSTK 12 diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h index a1a959ba24ff..b0e35eec6499 100644 --- a/tools/include/linux/coresight-pmu.h +++ b/tools/include/linux/coresight-pmu.h @@ -12,11 +12,13 @@ /* ETMv3.5/PTM's ETMCR config bit */ #define ETM_OPT_CYCACC 12 +#define ETM_OPT_CTXTID 14 #define ETM_OPT_TS 28 #define ETM_OPT_RETSTK 29 /* ETMv4 CONFIGR programming bits for the ETM OPTs */ #define ETM4_CFG_BIT_CYCACC 4 +#define ETM4_CFG_BIT_CTXTID 6 #define ETM4_CFG_BIT_TS 11 #define ETM4_CFG_BIT_RETSTK 12