From patchwork Wed Apr 10 23:12:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 162050 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp6763357jan; Wed, 10 Apr 2019 16:13:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqxFKDzzeYCXCtJyZGXmhLxdrYIepFAVqpvQU+cHOxq93nbEQjSP+670PrMqJJRu/JVPaUq+ X-Received: by 2002:a17:902:e684:: with SMTP id cn4mr45347477plb.71.1554938005939; Wed, 10 Apr 2019 16:13:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554938005; cv=none; d=google.com; s=arc-20160816; b=La+dTJYB7ti2rh8PpcVQikOrTqOeXaVesjOVuknjl0h/RNLTXO2WBcdR5SjMCxf/44 cB7W8SzfGCFtaIuN3PEWcP7AN3ac0sYd8by0Pllv8h6BYnM1Aa2U3sA/++TjZS3+An4v E/wtKsAByIEyZ7OaQ/0U/EGMeHzalUmxyeDLImjNmB+bsvS31dQq32t5PR2ipDFOztNs VQRN9cS6aMVbLxJOXG8u13GJAu8+7+PaD6YYin/qD6BLoktG4xLlsSMmUMhK5slQW2pL qMq9giBnW7vvfZ7tE6EhhCz0BUiHGkll8VoiGrw6FTiAb1UO4k/OEEH4guw0XcLPmbVe lnZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=bo57eUr9OjPnj/smZV3KgoX3m1PyLzgouFU30lrFoh0=; b=Dlvh9ym2k3puHlHOD17fNKV3YF0qFI7/eocGF1jSu+eSPzsoDYPRKk6yc7vYJlmE4E 0ts2CXS2jqg2y6gqOf2NUunkpt6d4uKQ+4R76N8Gw3Ln7kAgG8AOIsRZU6S+D45mOonF /K1c+9GtQkiP/yjS71bUTE7S3r+q1vqIzjRRmUQKn/mIq17Xx9KRoW6pgisQV55sY0ZR Odxn//jNYY5zaudTUqY+n24Dd4PYYxfLHQVan4eos2jCrvP3+L09pGm2P4BFyJ816tvE X0pIYEEP4QdX5N6xkKH5f2rmShRvwnc+3Or76pbUhTxsuV9ZtYUH23t7y69GUm9mhnst 6paw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c12si31425683pgq.390.2019.04.10.16.13.25; Wed, 10 Apr 2019 16:13:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726968AbfDJXNX (ORCPT + 31 others); Wed, 10 Apr 2019 19:13:23 -0400 Received: from foss.arm.com ([217.140.101.70]:33032 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726671AbfDJXM5 (ORCPT ); Wed, 10 Apr 2019 19:12:57 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88B06168F; Wed, 10 Apr 2019 16:12:57 -0700 (PDT) Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.29.246]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DED983F557; Wed, 10 Apr 2019 16:12:56 -0700 (PDT) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, Dave.Martin@arm.com, shankerd@codeaurora.org, julien.thierry@arm.com, mlangsdo@redhat.com, stefan.wahren@i2se.com, Andre.Przywara@arm.com, linux-kernel@vger.kernel.org, Jeremy Linton , Andre Przywara Subject: [v7 05/10] arm64: Use firmware to detect CPUs that are not affected by Spectre-v2 Date: Wed, 10 Apr 2019 18:12:32 -0500 Message-Id: <20190410231237.52506-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190410231237.52506-1-jeremy.linton@arm.com> References: <20190410231237.52506-1-jeremy.linton@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marc Zyngier The SMCCC ARCH_WORKAROUND_1 service can indicate that although the firmware knows about the Spectre-v2 mitigation, this particular CPU is not vulnerable, and it is thus not necessary to call the firmware on this CPU. Let's use this information to our benefit. Signed-off-by: Marc Zyngier Signed-off-by: Jeremy Linton Reviewed-by: Andre Przywara Reviewed-by: Catalin Marinas Tested-by: Stefan Wahren --- arch/arm64/kernel/cpu_errata.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) -- 2.20.1 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 2b6e6d8e105b..e5c4c5d84a4e 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -230,22 +230,36 @@ static int detect_harden_bp_fw(void) case PSCI_CONDUIT_HVC: arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + switch ((int)res.a0) { + case 1: + /* Firmware says we're just fine */ + return 0; + case 0: + cb = call_hvc_arch_workaround_1; + /* This is a guest, no need to patch KVM vectors */ + smccc_start = NULL; + smccc_end = NULL; + break; + default: return -1; - cb = call_hvc_arch_workaround_1; - /* This is a guest, no need to patch KVM vectors */ - smccc_start = NULL; - smccc_end = NULL; + } break; case PSCI_CONDUIT_SMC: arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + switch ((int)res.a0) { + case 1: + /* Firmware says we're just fine */ + return 0; + case 0: + cb = call_smc_arch_workaround_1; + smccc_start = __smccc_workaround_1_smc_start; + smccc_end = __smccc_workaround_1_smc_end; + break; + default: return -1; - cb = call_smc_arch_workaround_1; - smccc_start = __smccc_workaround_1_smc_start; - smccc_end = __smccc_workaround_1_smc_end; + } break; default: