diff mbox series

[v3,03/20] coresight: etm4x: Skip selector pair 0

Message ID 20190404033541.14072-4-mathieu.poirier@linaro.org
State Superseded
Headers show
Series coresight: Add support for CPU-wide trace scenarios | expand

Commit Message

Mathieu Poirier April 4, 2019, 3:35 a.m. UTC
Resource selector pair 0 is always implemented and reserved.  As such
it should not be explicitly programmed.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

---
 drivers/hwtracing/coresight/coresight-etm4x.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

-- 
2.17.1

Comments

Suzuki K Poulose April 4, 2019, 8:50 a.m. UTC | #1
On 04/04/2019 04:35, Mathieu Poirier wrote:
> Resource selector pair 0 is always implemented and reserved.  As such

> it should not be explicitly programmed.

> 

> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>


Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
diff mbox series

Patch

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 732ae12fca9b..d64192c29860 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -138,8 +138,11 @@  static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
 			       drvdata->base + TRCCNTVRn(i));
 	}
 
-	/* Resource selector pair 0 is always implemented and reserved */
-	for (i = 0; i < drvdata->nr_resource * 2; i++)
+	/*
+	 * Resource selector pair 0 is always implemented and reserved.  As
+	 * such start at 2.
+	 */
+	for (i = 2; i < drvdata->nr_resource * 2; i++)
 		writel_relaxed(config->res_ctrl[i],
 			       drvdata->base + TRCRSCTLRn(i));