From patchwork Thu Mar 21 16:36:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 160810 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1002503jan; Thu, 21 Mar 2019 09:37:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqyfnG0RCCkFPcXHWhtUS+wg3WeTmr7Ftw13N0qKSOh/xVJmzvn+Qjs7mNg0i0/0loXQ+NpS X-Received: by 2002:a63:145a:: with SMTP id 26mr4204247pgu.433.1553186254692; Thu, 21 Mar 2019 09:37:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553186254; cv=none; d=google.com; s=arc-20160816; b=Q+opT6HmnJwDG3PDtyO/TDSnnTvVAWSQBvYVi+JKXAyr3o5IlEiilyA6N+O3j+kvvd 7qfL2TQna5Pv24383xw8dtdy3RgDf6sQlcjk8Ji7LIMTyNKvqnVYA5X8sKbYJwvAgr6N ZgDuXglBL5ZKvqIDbbe+T04qIreLOVrtEGqyTrww2pdageCWO/PkRTkQz9yD4rzRb/kF Bwjz9Rjevl5QD+a7KwWLefgaMVyLL/ipvQsAhy6NR3p9J0AunqkGw3YgvYcunZ+7/AFC NVQmWHm4+NIX1TMqomGY8QjMlO+2LjHa/eaBeKiJ0RgGDsY26jY3l9rc/4qi8p1YxNSb paeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=8rjxcqRVMWA4IPRUsoYlEnUBVfCqm3DGIK6xJwlgONY=; b=vHJobWeGh7mAPphnvXMbGK9OeIWqrnZA2na4rz6Ckge3wqBr+UPwVs7bFt4Q2HSW2u q9wgL/blOava9P0uDHaY4acvfMMDWOsx5zUhjhRn1Ei7bCju9TvFp3CcFYdnJMWT2jTb 92XGUDSK6oE6STL6up+ZxkHEcnfp31m3Zi9A/5WolwXqds27wXtal5btbEGjEtVV2O2p iA7CRemF2g+Y+tiNHxzLYZXaE0MIkrFAsmiuD6L9doUlbugXaCdQc9vdw+ja6U9T8mbn sCt4txMRJQJS1Y2ZCq4QmkgJMrx9nvvaeemeEjD8Z9xfiARRU2PkWhN+R9tsvpizU1m8 rn9A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x14si4777895pgq.185.2019.03.21.09.37.34; Thu, 21 Mar 2019 09:37:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728724AbfCUQhG (ORCPT + 31 others); Thu, 21 Mar 2019 12:37:06 -0400 Received: from foss.arm.com ([217.140.101.70]:59462 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728700AbfCUQhD (ORCPT ); Thu, 21 Mar 2019 12:37:03 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B31B9168F; Thu, 21 Mar 2019 09:37:02 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C36303F614; Thu, 21 Mar 2019 09:37:00 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Cc: christoffer.dall@arm.com, james.morse@arm.com, marc.zyngier@arm.com, julien.thierry@arm.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Grall Subject: [PATCH RFC 10/14] arm64/mm: Introduce a callback to flush the local context Date: Thu, 21 Mar 2019 16:36:19 +0000 Message-Id: <20190321163623.20219-11-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190321163623.20219-1-julien.grall@arm.com> References: <20190321163623.20219-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Flushing the local context will vary depending on the actual user of the ASID allocator. Introduce a new callback to flush the local context and move the call to flush local TLB in it. Signed-off-by: Julien Grall --- arch/arm64/mm/context.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) -- 2.11.0 diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index cbf1c24cb3ee..678a57b77c91 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -39,6 +39,8 @@ struct asid_info cpumask_t flush_pending; /* Number of ASID allocated by context (shift value) */ unsigned int ctxt_shift; + /* Callback to locally flush the context. */ + void (*flush_cpu_ctxt_cb)(void); } asid_info; #define active_asid(info, cpu) *per_cpu_ptr((info)->active, cpu) @@ -266,7 +268,7 @@ static void asid_new_context(struct asid_info *info, atomic64_t *pasid, } if (cpumask_test_and_clear_cpu(cpu, &info->flush_pending)) - local_flush_tlb_all(); + info->flush_cpu_ctxt_cb(); atomic64_set(&active_asid(info, cpu), asid); raw_spin_unlock_irqrestore(&info->lock, flags); @@ -298,6 +300,11 @@ asmlinkage void post_ttbr_update_workaround(void) CONFIG_CAVIUM_ERRATUM_27456)); } +static void asid_flush_cpu_ctxt(void) +{ + local_flush_tlb_all(); +} + /* * Initialize the ASID allocator * @@ -308,10 +315,12 @@ asmlinkage void post_ttbr_update_workaround(void) * 2. */ static int asid_allocator_init(struct asid_info *info, - u32 bits, unsigned int asid_per_ctxt) + u32 bits, unsigned int asid_per_ctxt, + void (*flush_cpu_ctxt_cb)(void)) { info->bits = bits; info->ctxt_shift = ilog2(asid_per_ctxt); + info->flush_cpu_ctxt_cb = flush_cpu_ctxt_cb; /* * Expect allocation after rollover to fail if we don't have at least * one more ASID than CPUs. ASID #0 is always reserved. @@ -332,7 +341,8 @@ static int asids_init(void) { u32 bits = get_cpu_asid_bits(); - if (!asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT)) + if (!asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT, + asid_flush_cpu_ctxt)) panic("Unable to initialize ASID allocator for %lu ASIDs\n", 1UL << bits);