From patchwork Wed Feb 27 01:05:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 159253 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3851939jad; Tue, 26 Feb 2019 17:06:33 -0800 (PST) X-Google-Smtp-Source: AHgI3IaX8xAlYNvEzUrqjDfjakrwaC0b1TgpI4imX7uJDLiSnrzkksxr7CF87BNrsYQPzsfF3Wjr X-Received: by 2002:aa7:8743:: with SMTP id g3mr28468553pfo.109.1551229593647; Tue, 26 Feb 2019 17:06:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551229593; cv=none; d=google.com; s=arc-20160816; b=1IZCgHjrnBsro6nZvNL8lHLQ1WWxGpcHXSbotKgrFJVsInPGjrMyvTtErV2mO6HxKl /ZGGJ/olaW4VUXz2AhyACur/XZi1WfYNM5s+Zjl4s+L0hBD4ZAfEFcXYNKPXaIf0SGak DsmUcwxyz9FNgqc1Bpsuv1HmHOt4Zm6RYbgwgpuiUeJiqMSfwhAc4N4tNJs/XlKpF1QK IlUcZDatUoH4EGeHoUb0S74tHgO03l3l7sqcU69NGHTZUhy7FofXeuMFxvZN+RE5M9i8 2j5C1jYjw8X6eGHOynQpdxPkucBIRjRF4cYStjC7J7N5hWAmMyDhf9W7vrpbJ1cT370X PsAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=XaACyqQyl/bF2FBpKcJhMDY7xTgDh10WBd5aqOCTfmE=; b=PjEvysNbuAFF26yHacuJNzAn1SBy96bpHN0/a0bqebhig2s/xl4ABzU5mt1+PlK+4N c9zlzG+2gsROc6ukk7hS7GTMYWp3R/XtS/zxmQpp44NK3K79HeXuErFCQeCBsA+94YEI qKeJjG9CEveuYdOnAqtKYMtjJQTce37Scc+azMnBfqJBCmvqd8gaqcNVsGB2n+sH3/+V S5Aj9NiN6K0ap3Fe6GucJIEyrhFyRU1Si5XbEMk/shDHC+eJLehaNCsH7Yc4YvXZQJk0 +YaaSz5c2ArVtaWUa2TTi3mUc6+CWE1OSqkt+wXTQWA7ZCDOz7HUbDUq/5Rhc3tllI7p MEpQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a6si13664738pgc.137.2019.02.26.17.06.33; Tue, 26 Feb 2019 17:06:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729686AbfB0BGc (ORCPT + 31 others); Tue, 26 Feb 2019 20:06:32 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:55642 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729542AbfB0BGH (ORCPT ); Tue, 26 Feb 2019 20:06:07 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BFAA4174E; Tue, 26 Feb 2019 17:06:06 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2D1F93F5C1; Tue, 26 Feb 2019 17:06:06 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, Dave.Martin@arm.com, shankerd@codeaurora.org, julien.thierry@arm.com, mlangsdo@redhat.com, stefan.wahren@i2e.com, Andre.Przywara@arm.com, linux-kernel@vger.kernel.org, Jeremy Linton Subject: [PATCH v5 05/10] arm64: Use firmware to detect CPUs that are not affected by Spectre-v2 Date: Tue, 26 Feb 2019 19:05:39 -0600 Message-Id: <20190227010544.597579-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190227010544.597579-1-jeremy.linton@arm.com> References: <20190227010544.597579-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marc Zyngier The SMCCC ARCH_WORKAROUND_1 service can indicate that although the firmware knows about the Spectre-v2 mitigation, this particular CPU is not vulnerable, and it is thus not necessary to call the firmware on this CPU. Let's use this information to our benefit. Signed-off-by: Marc Zyngier Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpu_errata.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) -- 2.20.1 Reviewed-by: Andre Przywara diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index c8972255b365..77f021e78a28 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -230,22 +230,36 @@ static int detect_harden_bp_fw(void) case PSCI_CONDUIT_HVC: arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + switch ((int)res.a0) { + case 1: + /* Firmware says we're just fine */ + return 0; + case 0: + cb = call_hvc_arch_workaround_1; + /* This is a guest, no need to patch KVM vectors */ + smccc_start = NULL; + smccc_end = NULL; + break; + default: return -1; - cb = call_hvc_arch_workaround_1; - /* This is a guest, no need to patch KVM vectors */ - smccc_start = NULL; - smccc_end = NULL; + } break; case PSCI_CONDUIT_SMC: arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + switch ((int)res.a0) { + case 1: + /* Firmware says we're just fine */ + return 0; + case 0: + cb = call_smc_arch_workaround_1; + smccc_start = __smccc_workaround_1_smc_start; + smccc_end = __smccc_workaround_1_smc_end; + break; + default: return -1; - cb = call_smc_arch_workaround_1; - smccc_start = __smccc_workaround_1_smc_start; - smccc_end = __smccc_workaround_1_smc_end; + } break; default: