From patchwork Tue Feb 19 07:54:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 158691 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3377548jaa; Mon, 18 Feb 2019 23:57:13 -0800 (PST) X-Google-Smtp-Source: AHgI3IZJG0+Yf41Vn4CmhdKOuuVBU6lhgqzRzNe9WFDEb1vSCmdoYRK24tjRO6cP210gco53ZVu6 X-Received: by 2002:a63:2882:: with SMTP id o124mr22910930pgo.446.1550563033836; Mon, 18 Feb 2019 23:57:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550563033; cv=none; d=google.com; s=arc-20160816; b=BqtC9htFETvpJ7S666QcP3ARlDrlXysTpfNX3SG1SgihfRuUXYGLbcLK/KvAwNj8/I kBWjBP95q5zsegu/S4QjhMnwFSgoxapc+N3jheTTKNG/qPv5Hk+z8F2t0G9qeKnX4bSG NBhcZ/cleGwHd3OYNkLA2qtcDRZB801jn01zejo0qfpR66BtUzzFSvLPSMhbpBL3FVNE 4YdgbMZcITb7xXpHH0IJdbPW8zMJV/yZ9XI65hMR4/6itIv5Rbm7D6hLKnROc7T2zfdZ 4BoLxNocmPVWC3Cwc1DeDx3f1ZtbDTiYBH7km0+lVC7zuCdu/H/qtJ9QfjBWwgiMgGAr 93jw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=kSh+WRN1tSr4rPWX19ZsxOmKOuPIBQXusUyxrJybnA4=; b=gyMjXDv/tupIj5N+aaHm2Ws74Rtz5KNArBB9wlwj8vEiYDbuNi+Y0X1AufTL/bTwti dfp9KwIa8bL/euR2YffcVslFW7VE/d5w58KZvZBIFSHimXHKZdk4sUrNNMS0iIaj1uz0 AafTS4QtvQiLm5PP9ABFVNeNNDHkW5sW2+lyYbKNAQ0lT8pHOfybbli1ATevZ0ZydZPl b3iMYx5qnVqJzQRf6TvGI+giZ6avBzrVNPVfGCG8st8yJovMZsqzI6oQQTgUY8v82OSN 2n0KlELjGu2p1u182lxrt8zWRsblcujvkf2jyNfYshkNFnEUK3PO2bXRxScNwQGphs1F IiCw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l7si17032453plb.366.2019.02.18.23.57.13; Mon, 18 Feb 2019 23:57:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727680AbfBSH5L (ORCPT + 32 others); Tue, 19 Feb 2019 02:57:11 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:3781 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727298AbfBSH5I (ORCPT ); Tue, 19 Feb 2019 02:57:08 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id C2A23C5DFA5D557064F3; Tue, 19 Feb 2019 15:57:05 +0800 (CST) Received: from HGHY1l002753561.china.huawei.com (10.177.23.164) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.408.0; Tue, 19 Feb 2019 15:56:56 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH 3/5] iommu/arm-smmu-v3: add macro xxx_SIZE to replace xxx_DWORDS shift Date: Tue, 19 Feb 2019 15:54:41 +0800 Message-ID: <20190219075443.17732-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.19.2.windows.1 In-Reply-To: <20190219075443.17732-1-thunder.leizhen@huawei.com> References: <20190219075443.17732-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The (STRTAB_L1_DESC_DWORDS << 3) appears more than 1 times, replace it with STRTAB_L1_DESC_SIZE to eliminate the duplication. And the latter seems more clear when it's used to calculate memory size. And the same is true for STRTAB_STE_DWORDS and CTXDESC_CD_DWORDS. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index c3c4ff2..5bb5dcd 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -202,10 +202,12 @@ #define STRTAB_SPLIT 8 #define STRTAB_L1_DESC_DWORDS 1 +#define STRTAB_L1_DESC_SIZE (STRTAB_L1_DESC_DWORDS << 3) #define STRTAB_L1_DESC_SPAN GENMASK_ULL(4, 0) #define STRTAB_L1_DESC_L2PTR_MASK GENMASK_ULL(51, 6) #define STRTAB_STE_DWORDS 8 +#define STRTAB_STE_SIZE (STRTAB_STE_DWORDS << 3) #define STRTAB_STE_0_V (1UL << 0) #define STRTAB_STE_0_CFG GENMASK_ULL(3, 1) #define STRTAB_STE_0_CFG_ABORT 0 @@ -251,6 +253,7 @@ /* Context descriptor (stage-1 only) */ #define CTXDESC_CD_DWORDS 8 +#define CTXDESC_CD_SIZE (CTXDESC_CD_DWORDS << 3) #define CTXDESC_CD_0_TCR_T0SZ GENMASK_ULL(5, 0) #define ARM64_TCR_T0SZ GENMASK_ULL(5, 0) #define CTXDESC_CD_0_TCR_TG0 GENMASK_ULL(7, 6) @@ -1563,7 +1566,7 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) if (cfg->cdptr) { dmam_free_coherent(smmu_domain->smmu->dev, - CTXDESC_CD_DWORDS << 3, + CTXDESC_CD_SIZE, cfg->cdptr, cfg->cdptr_dma); @@ -1590,7 +1593,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (asid < 0) return asid; - cfg->cdptr = dmam_alloc_coherent(smmu->dev, CTXDESC_CD_DWORDS << 3, + cfg->cdptr = dmam_alloc_coherent(smmu->dev, CTXDESC_CD_SIZE, &cfg->cdptr_dma, GFP_KERNEL | __GFP_ZERO); if (!cfg->cdptr) { @@ -2176,7 +2179,7 @@ static int arm_smmu_init_l1_strtab(struct arm_smmu_device *smmu) arm_smmu_init_dummy_l2_strtab(smmu, i << STRTAB_SPLIT); } else { arm_smmu_write_strtab_l1_desc(strtab, &cfg->l1_desc[i]); - strtab += STRTAB_L1_DESC_DWORDS << 3; + strtab += STRTAB_L1_DESC_SIZE; } } @@ -2201,7 +2204,7 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) "2-level strtab only covers %u/%u bits of SID\n", size, smmu->sid_bits); - l1size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3); + l1size = cfg->num_l1_ents * STRTAB_L1_DESC_SIZE; strtab = dmam_alloc_coherent(smmu->dev, l1size, &cfg->strtab_dma, GFP_KERNEL | __GFP_ZERO); if (!strtab) { @@ -2228,7 +2231,7 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) u32 size; struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; - size = (1 << smmu->sid_bits) * (STRTAB_STE_DWORDS << 3); + size = (1 << smmu->sid_bits) * STRTAB_STE_SIZE; strtab = dmam_alloc_coherent(smmu->dev, size, &cfg->strtab_dma, GFP_KERNEL | __GFP_ZERO); if (!strtab) {