From patchwork Mon Jan 14 13:24:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 155464 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3655186jaa; Mon, 14 Jan 2019 05:25:32 -0800 (PST) X-Google-Smtp-Source: ALg8bN7KohmVJC019wQafHHSfn2fGbuc/ryaom9ZMWDB2HW9/MxCxyqUlCHuR6aKi/HSHmXvJurn X-Received: by 2002:a62:5003:: with SMTP id e3mr26153999pfb.23.1547472332571; Mon, 14 Jan 2019 05:25:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547472332; cv=none; d=google.com; s=arc-20160816; b=BQl7T0KqLLsZVQMnL3ERDbPkTnKqkuGN0a4ostHIGgXaahPgS1fO42AZ8oKTGHTihr R/8602HyvCsYzH+KwBO8vL4c64BQrvrKfPNvd/MNFtDX+XgmvPtV4mIfk2AUYkQqyZEa 5QZYtrPCRLDtjxOlfow0IuLogstA0RtGJPR4u0OTpo1B4V1E6ZvOnphM67Icpkc5UaRg 5HCbMkVAlyJvTb13YYFkll0+v8Xfs/mt+WXIWczGh5JmU+1v6IW4LXpziXH8q3JftEl+ PqIUMmTOqPQ3uRl0DGMCtKEATGXjgdGldzkQQf5oZKH3j1f8W6qmq7HJbgPMHuxWMgjY IarQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=TXLdx2SAosMFqyOjlSQie8ZcUaPTkakA6by1/PgLXHo=; b=htiaTDG98h+rJHMY0/gEdh35tHxDmP3C6azaqAaNu8aXGGoA9W6S5uPhh/TOiV08/M zRAb2KOCJ8+fiRPkypu3YvHqMPs1+y9R543nDbCgggJFVVRfLIm2EjRKdDqkSwWuGXpn oUeAIo2h94gALV+p15PwsNQWElKKgs3f+CFLi4F/b5Am0njKZJN8eexNwM/1dSEDlZEF M3te+DJaN1qmHHH+Fl943rijgF/nUi7CwhAvp6hBRIN5RgwlYMGeZ0ANG0bnPzwKqJHq EgRKSlVzlPvJ+9hGNFCb/DfoLUt+8ckjkH9yAobwQfibeTUfkQa7tOKg2X0VKvoiUNy5 plSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=nYzVyI5K; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q9si377168pgi.89.2019.01.14.05.25.32; Mon, 14 Jan 2019 05:25:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=nYzVyI5K; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726715AbfANNZa (ORCPT + 31 others); Mon, 14 Jan 2019 08:25:30 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:40930 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726525AbfANNZ1 (ORCPT ); Mon, 14 Jan 2019 08:25:27 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0EDPAxx019305; Mon, 14 Jan 2019 07:25:10 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547472310; bh=TXLdx2SAosMFqyOjlSQie8ZcUaPTkakA6by1/PgLXHo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nYzVyI5KUJ+mMVZEpLIUqw5HX93v3kPPKjIRord7C45K+29Cc7nLbKzK0WvK716Hb 4OvbRZCAzQe3eOtpwps2Vgj5Uv4zo5DQuPP8Dce298Yltlu7oo6yIu39fw0saQQme/ odVtamfyu8iqSd4HWCE5Qf2DKoVUK+lOZy2tomUs= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0EDPAOb011734 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 14 Jan 2019 07:25:10 -0600 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 14 Jan 2019 07:25:10 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 14 Jan 2019 07:25:10 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0EDOoWP028516; Mon, 14 Jan 2019 07:25:06 -0600 From: Kishon Vijay Abraham I To: Gustavo Pimentel , Rob Herring , Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Jingoo Han , Bjorn Helgaas , Mark Rutland , Arnd Bergmann , Greg Kroah-Hartman , Murali Karicheri , Jesper Nilsson , , , , , , Subject: [PATCH 03/24] dt-bindings: PCI: keystone: Add "reg-names" binding information Date: Mon, 14 Jan 2019 18:54:03 +0530 Message-ID: <20190114132424.6445-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190114132424.6445-1-kishon@ti.com> References: <20190114132424.6445-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add "reg-names" binding information in order for device tree node to be populated with the correct register strings. This will break old dt compatibility. However Keystone PCI has never worked in upstream kernel due to lack of SERDES support. Before SERDES support is added, cleanup the Keystone PCI dt-bindngs. This new binding will also be used by PCI in AM654 platform. Signed-off-by: Kishon Vijay Abraham I --- Documentation/devicetree/bindings/pci/pci-keystone.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt index 2030ee0dc4f9..3a551687cfa2 100644 --- a/Documentation/devicetree/bindings/pci/pci-keystone.txt +++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt @@ -12,8 +12,10 @@ described here as well as properties that are not applicable. Required Properties:- compatibility: "ti,keystone-pcie" -reg: index 1 is the base address and length of DW application registers. - index 2 is the base address and length of PCI device ID register. +reg: Three register ranges as listed in the reg-names property +reg-names: "dbics" for the DesignWare PCIe registers, "app" for the + TI specific application registers, "config" for the + configuration space address pcie_msi_intc : Interrupt controller device node for MSI IRQ chip interrupt-cells: should be set to 1