From patchwork Mon Jan 14 13:24:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 155479 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3657283jaa; Mon, 14 Jan 2019 05:27:21 -0800 (PST) X-Google-Smtp-Source: ALg8bN72ywLA187zgs6ZBuvZeKFND9NykbzNjWoryz1g+VAgLynxHcj1gUUEPwRoIsknq5bMxRTH X-Received: by 2002:a17:902:33c2:: with SMTP id b60mr25418200plc.211.1547472441421; Mon, 14 Jan 2019 05:27:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547472441; cv=none; d=google.com; s=arc-20160816; b=Gavr0IF+JncC6myqfasHAkD+yWymCWhr41ygdV4zgcIVzAX6dGtIYjO/DBR7m5aCNm 6ckKu7tf7gB7IaOBBIVeGYc0j7GAjMWA+JQcqT9ubXJSMY8AQ5VRqYICWqWL46zn16Ly Uw0E1TY/d70i05X4o3fmjNhlGB1Cc0QEAm2s3mP0kySeoRvFyjzVofC7oigRcIukOpNI HL/G0u+FhAFbjmpJVlyRcGG9g49mw7DkAAiBrPo2vc0rypzjMGBt1bUphEoqmyyTC0mQ vsvvxjN84qKzRDs8BoBdWen1U72OosMI3ApcUF7djfpgAuXcfhG5/KeSVArQZRal8PyB VvtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=WBTdWRfYLKWv54dEuesWhlPv+Ca+Oa1+3N9tCdOgMMQ=; b=yIO5Eqtl4sDzydlb2su16HxJfPdDSNIJcjctD2VFGgeMo6U0uACK3x7OjSALK17iQu TgVIEck9WJ/t+VGNb4LpCw+kLUIZQaMP/JSPE2Tbdot4HnHtDjBs7sxHOWuBTr7hLtid ZMZBdhu3jHBDULojqUwQ0QTsodNXElbFOuPUbqtz1vnV+8a9Y7lXFjOSW/thfg9AAWHk ZEUTYOIo9ABXNCOg4DWanCNgKnNxNCv1/PgMa1wPNLgkJQECJPlH6J4po5haQBQUJRfr Vr1Elb5rvTe1HPhJNkGGyxLfoWSAqm9neNUtWEjzDd0DcicTo3wL3gUPQ8rPnDXOBSF2 lOSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EiD2ok1L; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b27si332403pgb.107.2019.01.14.05.27.21; Mon, 14 Jan 2019 05:27:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EiD2ok1L; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727036AbfANN1U (ORCPT + 31 others); Mon, 14 Jan 2019 08:27:20 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:37584 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726559AbfANN1R (ORCPT ); Mon, 14 Jan 2019 08:27:17 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0EDQc6x098319; Mon, 14 Jan 2019 07:26:38 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547472398; bh=WBTdWRfYLKWv54dEuesWhlPv+Ca+Oa1+3N9tCdOgMMQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=EiD2ok1L6yzy+FmC75cU6k4+yTVtgx09w/7qmefhAVIHquBjNjL85yvF4VQM/RG69 owmV21aQxFDSOw1jfbwF3NzIHgYRrZYzP1+SXZ7COZmWEWznnYpM7bSxwO++APcuVu NjB7RjSCavhu1EofazTRK4/ErdxF6Grh0Qj01iP4= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0EDQcBO012761 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 14 Jan 2019 07:26:38 -0600 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 14 Jan 2019 07:26:37 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 14 Jan 2019 07:26:38 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0EDOoWh028516; Mon, 14 Jan 2019 07:26:33 -0600 From: Kishon Vijay Abraham I To: Gustavo Pimentel , Rob Herring , Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Jingoo Han , Bjorn Helgaas , Mark Rutland , Arnd Bergmann , Greg Kroah-Hartman , Murali Karicheri , Jesper Nilsson , , , , , , Subject: [PATCH 21/24] PCI: designware-ep: Configure RESBAR to advertise the smallest size Date: Mon, 14 Jan 2019 18:54:21 +0530 Message-ID: <20190114132424.6445-22-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190114132424.6445-1-kishon@ti.com> References: <20190114132424.6445-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Configure RESBAR capability to advertise the smallest size (1MB) for couple of reasons. A) Host side resource allocation of BAR fails for larger sizes. B) Endpoint function driver does not allocate memory for all supported sizes in RESBAR capability. If and when there is a usecase required to add more flexibility using RESBAR, this can be revisited. Signed-off-by: Kishon Vijay Abraham I --- .../pci/controller/dwc/pcie-designware-ep.c | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index cd51b008858c..47cc06bac91f 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -502,10 +502,32 @@ void dw_pcie_ep_exit(struct dw_pcie_ep *ep) pci_epc_mem_exit(epc); } +static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap) +{ + u32 header; + int pos = PCI_CFG_SPACE_SIZE; + + while (pos) { + header = dw_pcie_readl_dbi(pci, pos); + if (PCI_EXT_CAP_ID(header) == cap) + return pos; + + pos = PCI_EXT_CAP_NEXT(header); + if (!pos) + break; + } + + return 0; +} + int dw_pcie_ep_init(struct dw_pcie_ep *ep) { + int i; int ret; + u32 reg; void *addr; + unsigned int nbars; + unsigned int offset; struct pci_epc *epc; struct dw_pcie *pci = to_dw_pcie_from_ep(ep); struct device *dev = pci->dev; @@ -589,6 +611,18 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep) ep->msix_cap = dw_pcie_ep_find_capability(pci, PCI_CAP_ID_MSIX); + offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); + if (offset) { + reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); + nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> + PCI_REBAR_CTRL_NBAR_SHIFT; + + dw_pcie_dbi_ro_wr_en(pci); + for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) + dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); + dw_pcie_dbi_ro_wr_dis(pci); + } + dw_pcie_setup(pci); return 0;