From patchwork Mon Jan 14 13:24:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 155477 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3657067jaa; Mon, 14 Jan 2019 05:27:10 -0800 (PST) X-Google-Smtp-Source: ALg8bN5li3sGJHLUrHX6OxjIsRsBRH2iEtZ1b609bJoB3KCRYvpmlb8RGWZbnJkw9om0FITNztHz X-Received: by 2002:a63:cd11:: with SMTP id i17mr23049484pgg.345.1547472430084; Mon, 14 Jan 2019 05:27:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547472430; cv=none; d=google.com; s=arc-20160816; b=lI/eLZRfst4h+EqZujDiA0rmFRcUieH+P9dO0SnLbA7Zrw6wRHWcfIAKopEGNVRlF6 ZobjQ8T5LDAziChJ8j6xW3wSB17Bv68A/rIKHc9d6Vo+GCRESUbdi7oRPz9LyO273hke y3R3cCZQKF4NeYFAMaOqNDEfCCdRbQbABPh492z1rqo95sUx4WbaCfTe9kmN3OSWMdrG E/9oMqwFBnoLKZ/mXH98UbxI9+LPsCVRsO/9b4LPSLm11hKOohlbBCoCagyJCHbVMmn9 /fXT/KUpGKg+zFkmUlPM8kbJdUvccoKAd8HHyLcBoHFb4EHfXk9nLx3TDfei29r3kTH9 GnMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=jYEVHutp0v29B4vfiqJTI22HzuJxQ7SOmOLmjmfhfQ0=; b=IEypINtg0mvsVJvHtN75Xr8S1SIH7pETO83r+L4pq2TIDFA8Z7m72H2Sdjshnh0cJG BpysU43BLb5Hvsc7WaE8U+yM09PTIAtCpR6DIip4Ut+Myvv4EcShrKEotRi1/f7xSsCG a/fOfxMqXFKfuxSCEWROiS4n5pWSLKajPXzkUYzRPV06D25i8re1xm59iutclS4WPKbi cUPzWfKnaEvnSLLSrR9wuZ1Lf0kHqD6GMHaeCF8baxXhrokqEcXUttTF8jns/PNzgNSh 4iXPIH22LYxQQttxv1uVG9KgwpYitI0eSasRb1J6XZnwWyixiiGSO1F4ivyFWAzzUMMY 9dVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=LgOlGy4N; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si321303pgh.510.2019.01.14.05.27.09; Mon, 14 Jan 2019 05:27:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=LgOlGy4N; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726987AbfANN1J (ORCPT + 31 others); Mon, 14 Jan 2019 08:27:09 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:41038 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726624AbfANN04 (ORCPT ); Mon, 14 Jan 2019 08:26:56 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0EDQNdX041522; Mon, 14 Jan 2019 07:26:23 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547472383; bh=jYEVHutp0v29B4vfiqJTI22HzuJxQ7SOmOLmjmfhfQ0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LgOlGy4NgpIjpvhvjeFNp7k+EJqQaC1dStD2NaujHPGsfVGi23pgkpuDx/erK03sg doJ9gkfcp6JxCExzgpHNFAQP5N6B4UTHEFD4XihreaEcNP6b0y9OWxlln5wg8QdHJI KRCXx5OH1HjHTbr0/3UfrtrGuZqPxO6o3cFJDwJ4= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0EDQNPu089642 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 14 Jan 2019 07:26:23 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 14 Jan 2019 07:26:23 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 14 Jan 2019 07:26:23 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0EDOoWe028516; Mon, 14 Jan 2019 07:26:19 -0600 From: Kishon Vijay Abraham I To: Gustavo Pimentel , Rob Herring , Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Jingoo Han , Bjorn Helgaas , Mark Rutland , Arnd Bergmann , Greg Kroah-Hartman , Murali Karicheri , Jesper Nilsson , , , , , , Subject: [PATCH 18/24] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset Date: Mon, 14 Jan 2019 18:54:18 +0530 Message-ID: <20190114132424.6445-19-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190114132424.6445-1-kishon@ti.com> References: <20190114132424.6445-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org commit beb4641a787df79a ("PCI: dwc: Add MSI-X callbacks handler") while adding MSI-X callback handler, introduced dw_pcie_ep_find_capability and __dw_pcie_ep_find_next_cap for finding the MSI and MSIX capability. However if MSI or MSIX capability is the last capability (i.e there are no additional items in the capabilities list and the Next Capability Pointer is set to '0'), __dw_pcie_ep_find_next_cap will return '0' even though MSI or MSIX capability may be present. This is because of incorrect ordering of "next_cap_ptr" check. Fix it here. Fixes: beb4641a787df79a142 ("PCI: dwc: Add MSI-X callbacks handler") Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pcie-designware-ep.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index d5144781005b..cd51b008858c 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -46,16 +46,19 @@ static u8 __dw_pcie_ep_find_next_cap(struct dw_pcie *pci, u8 cap_ptr, u8 cap_id, next_cap_ptr; u16 reg; + if (!cap_ptr) + return 0; + reg = dw_pcie_readw_dbi(pci, cap_ptr); - next_cap_ptr = (reg & 0xff00) >> 8; cap_id = (reg & 0x00ff); - if (!next_cap_ptr || cap_id > PCI_CAP_ID_MAX) + if (cap_id > PCI_CAP_ID_MAX) return 0; if (cap_id == cap) return cap_ptr; + next_cap_ptr = (reg & 0xff00) >> 8; return __dw_pcie_ep_find_next_cap(pci, next_cap_ptr, cap); } @@ -67,9 +70,6 @@ static u8 dw_pcie_ep_find_capability(struct dw_pcie *pci, u8 cap) reg = dw_pcie_readw_dbi(pci, PCI_CAPABILITY_LIST); next_cap_ptr = (reg & 0x00ff); - if (!next_cap_ptr) - return 0; - return __dw_pcie_ep_find_next_cap(pci, next_cap_ptr, cap); }