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[209.132.180.67]) by mx.google.com with ESMTP id 87si144516pfs.7.2019.01.14.03.16.33; Mon, 14 Jan 2019 03:16:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=enDfy+2C; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726795AbfANLQd (ORCPT + 31 others); Mon, 14 Jan 2019 06:16:33 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:46868 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726623AbfANLQ1 (ORCPT ); Mon, 14 Jan 2019 06:16:27 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0EBG31j065515; Mon, 14 Jan 2019 05:16:03 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547464563; bh=B87URmk8FxmkzbOiUN33pM2ksJFStfqzKpKRhu9JNSU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=enDfy+2CkwQlJL5pG2orA0+8L0UPvpQC1aO4S9pOm3q70K2elptWNMrgClYxz/sxs NyoXk01Vo8+2jA0CHMl8uYbD/XQsNaatfWfT9N4/UplnCxo3jhWfDGl61lynfv7kqB zj9HxLt0SWxx8Aammbv01fyrS46OvNuip7Tv+9+c= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0EBG3NH067318 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 14 Jan 2019 05:16:03 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 14 Jan 2019 05:16:02 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 14 Jan 2019 05:16:02 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0EBFd1X011560; Mon, 14 Jan 2019 05:15:59 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Lorenzo Pieralisi , Gustavo Pimentel , Alan Douglas , Shawn Lin , Heiko Stuebner CC: Bjorn Helgaas , Jingoo Han , , , , , Subject: [PATCH v2 05/15] PCI: rockchip: Populate ->get_features() dw_pcie_ep_ops Date: Mon, 14 Jan 2019 16:45:03 +0530 Message-ID: <20190114111513.21618-6-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190114111513.21618-1-kishon@ti.com> References: <20190114111513.21618-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Populate ->get_features() dw_pcie_ep_ops to return the EPC features supported by Rockchip PCIe endpoint controller. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/pcie-rockchip-ep.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.17.1 diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index b8163c56a142..9b60ad323ac7 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -505,6 +505,18 @@ static int rockchip_pcie_ep_start(struct pci_epc *epc) return 0; } +static const struct pci_epc_features rockchip_pcie_epc_features = { + .linkup_notifier = false, + .msi_capable = true, + .msix_capable = false, +}; + +static const struct pci_epc_features* +rockchip_pcie_ep_get_features(struct pci_epc *epc, u8 func_no) +{ + return &rockchip_pcie_epc_features; +} + static const struct pci_epc_ops rockchip_pcie_epc_ops = { .write_header = rockchip_pcie_ep_write_header, .set_bar = rockchip_pcie_ep_set_bar, @@ -515,6 +527,7 @@ static const struct pci_epc_ops rockchip_pcie_epc_ops = { .get_msi = rockchip_pcie_ep_get_msi, .raise_irq = rockchip_pcie_ep_raise_irq, .start = rockchip_pcie_ep_start, + .get_features = rockchip_pcie_ep_get_features, }; static int rockchip_pcie_parse_ep_dt(struct rockchip_pcie *rockchip,