From patchwork Fri Dec 7 21:08:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 153200 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp972875ljp; Fri, 7 Dec 2018 13:09:40 -0800 (PST) X-Google-Smtp-Source: AFSGD/Xhz2Jsa5d/cyFLHOtD1MKNi8Lswr3Nzjf1s2PPqlkHoYLRYnvW4US8xkXRi0oXNCEujg/6 X-Received: by 2002:a17:902:930b:: with SMTP id bc11mr3715625plb.17.1544216980163; Fri, 07 Dec 2018 13:09:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544216980; cv=none; d=google.com; s=arc-20160816; b=qO/YOyB11KDZ3TBXwAstEQLbvUGKSc/6lYaroU9no0C0e2dMGGdUfJRkTEFvNZOPxh ME5nwjbVj91m5P5wy6+aJvAoIcqTzQMwEWKp1LEYSE2O3865ig1vQ5L6cszyadct6GjD PA9ijdbO3/48qZUHGsuAHVV+XUf7h+h6tkJPTtdgSi2gmMfy608+znEr+0Y+clhUc4Tn zJSduOOkXnpRy4Ra9RjVo/CszXZHDz1aM+QeGnJVhXcS71Urx1okAyS3Vqx9pbwlb4ZF 1PAFZ9TQGgnOLcYfTAjYBGcJZofUxxyn++UKAEEmZR2QB5RY57WfgEdzf7eeOXop1tv7 /M0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Vd/ZzNVkznoNihNP4Ea9Bq78zFFmxwNUSlQjuIFLKVs=; b=nB/RxYb9tpkX2UjpOIRsH9JvPba/dt1L5P5ZW6Vz+ZN5CW12MO556Df6NGz/Ug3Z2q 9JERVA78BhMC44Iaka+bRaQVQlKg9c6lLrMzGW+wQXuPcYYZF9OkvaU0LuRe1vjISYhk gjeqUpmNXbV1alx3iYdMuxPQ+vb8WdQdc8yTRSqgx56bRsh1xP5hE2QjlJ1Ne59+ODut +rG9bj32TH+DibnsNwVBvzmYwyfQOrZMpid0TrPh35V/BIVEmsfoC9hFQWBKx1KJq5sG GmyrcWOYdvyGFxcs3D8g4u5UGfSBVGeFq0gICZE2yfMc0zPhI9rEOoy0Cw66fewtGtif L7ow== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a34si3514825pgm.427.2018.12.07.13.09.39; Fri, 07 Dec 2018 13:09:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726293AbeLGVJi (ORCPT + 31 others); Fri, 7 Dec 2018 16:09:38 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:59892 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726218AbeLGVJi (ORCPT ); Fri, 7 Dec 2018 16:09:38 -0500 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 3FACB783EFD07; Sat, 8 Dec 2018 05:09:35 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.54) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Sat, 8 Dec 2018 05:09:25 +0800 From: Salil Mehta To: CC: , , , , , , , Shiju Jose Subject: [PATCH net-next 05/14] net: hns3: rename process_hw_error function Date: Fri, 7 Dec 2018 21:08:02 +0000 Message-ID: <20181207210811.23844-6-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181207210811.23844-1-salil.mehta@huawei.com> References: <20181207210811.23844-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.54] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shiju Jose This patch renames process_hw_error function to handle_hw_ras_error function to match the purpose of the function. This is because hw errors reported through ras and msix interrupts will be handled separately. Signed-off-by: Shiju Jose Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 2 +- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 4 ++-- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 2 +- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 2 +- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index a1707b7..9d9f4f9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -454,7 +454,7 @@ struct hnae3_ae_ops { int (*restore_fd_rules)(struct hnae3_handle *handle); void (*enable_fd)(struct hnae3_handle *handle, bool enable); int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf); - pci_ers_result_t (*process_hw_error)(struct hnae3_ae_dev *ae_dev); + pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); bool (*get_hw_reset_stat)(struct hnae3_handle *handle); bool (*ae_dev_resetting)(struct hnae3_handle *handle); unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index d1b2de2..69142a3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -1828,8 +1828,8 @@ static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev, return PCI_ERS_RESULT_NONE; } - if (ae_dev->ops->process_hw_error) - ret = ae_dev->ops->process_hw_error(ae_dev); + if (ae_dev->ops->handle_hw_ras_error) + ret = ae_dev->ops->handle_hw_ras_error(ae_dev); else return PCI_ERS_RESULT_NONE; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c index 62fab23..2d07be8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c @@ -603,7 +603,7 @@ int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state) return ret; } -pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev) +pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev) { struct hclge_dev *hdev = ae_dev->priv; struct device *dev = &hdev->pdev->dev; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h index 405739b..9fe1c96 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h @@ -59,5 +59,5 @@ struct hclge_hw_error { }; int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state); -pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev); +pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev); #endif diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 431d92a..354ac5f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -7935,7 +7935,7 @@ static const struct hnae3_ae_ops hclge_ops = { .restore_fd_rules = hclge_restore_fd_entries, .enable_fd = hclge_enable_fd, .dbg_run_cmd = hclge_dbg_run_cmd, - .process_hw_error = hclge_process_ras_hw_error, + .handle_hw_ras_error = hclge_handle_hw_ras_error, .get_hw_reset_stat = hclge_get_hw_reset_stat, .ae_dev_resetting = hclge_ae_dev_resetting, .ae_dev_reset_cnt = hclge_ae_dev_reset_cnt,