From patchwork Fri Dec 7 21:08:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 153198 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp972778ljp; Fri, 7 Dec 2018 13:09:34 -0800 (PST) X-Google-Smtp-Source: AFSGD/Vt46oX8pVqd1GjaIy2VslGUEplhjrLjNZfI8iOd5WZJkXlnvFXD5ciu2k0tJMnmC6kc9xX X-Received: by 2002:a62:a510:: with SMTP id v16mr3744747pfm.18.1544216974225; Fri, 07 Dec 2018 13:09:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544216974; cv=none; d=google.com; s=arc-20160816; b=YOYvErmGFGOAP6z9xVYcPx1Pf0VfVk4YELTG3I51eOiKVVRWoNlvVdk9DMOR1aJRFL SE1/qGewJnUmXvhDqKzj1wk+BWq1vn88NjLf/f/8r9iTVF28sBpKM/KY7dYPFRVYxNT3 +eyYySHCs3qIsF2uyJol/tnDqhhVvYaxSUO+e/k7k1hkFTMqZUZZugxDwEhpQWqeEa+D wj++fAlTU18WK3zN3I5poYeqsePP2QfNHpvpNmnz4r2uRgrL9TP6gWrlLtanXAcY6nlk bWFnA2vlp29OxSaplUNmvNSvaGww0IUbqp1MIxBNBqD/WYlgufmPr8OOtZm0aY3LApSv igVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Og7JadlhwRvK1sW1epFiP1sWOKGdKq2MDqJCZNwW6WY=; b=i9qg8sB0xeX4FUhf/Xa1ydRvuD2qOFWhLHt0wfdWizMCOjNU0D3xiYg+srKRI0sJJy l1GQEkNrJDgUtIYcG9AfXXfwHEaFiS+AeZbF4kLpMPz70X1Mbd8hrHR+mZdjTl6meu3y YnSIccSwh3lSsAE3MzU2u1Q0jzZYJwe0ko7aZM3I/8r1Jl7vYB4SWBqcQaqYlesquLRH cfINgTIjwCpDxBvIwGO8ixznjtsVeoMYtPMnRuGsUldEbfn3LAwx4h6oPcsZ6uWnyLT7 94nHHPsdehnKNZ13X0bJajaX05k2KAyjIRU/Aa3CSV/by7mEK+WawtvrUm2iy7wwQg1V wocg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z71si3508766pgd.490.2018.12.07.13.09.33; Fri, 07 Dec 2018 13:09:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726238AbeLGVJc (ORCPT + 31 others); Fri, 7 Dec 2018 16:09:32 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:15660 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726189AbeLGVJ2 (ORCPT ); Fri, 7 Dec 2018 16:09:28 -0500 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id E13F6F4D0C8EF; Sat, 8 Dec 2018 05:09:24 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.54) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Sat, 8 Dec 2018 05:09:19 +0800 From: Salil Mehta To: CC: , , , , , , , Shiju Jose Subject: [PATCH net-next 03/14] net: hns3: re-enable error interrupts on hw reset Date: Fri, 7 Dec 2018 21:08:00 +0000 Message-ID: <20181207210811.23844-4-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181207210811.23844-1-salil.mehta@huawei.com> References: <20181207210811.23844-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.54] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shiju Jose This patch adds calling hclge_hw_error_set_state function to re-enable the error interrupts those will be disabled on the hw reset. Signed-off-by: Shiju Jose Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 2 +- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 1 - drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 14 +++++++++----- 3 files changed, 10 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c index 21437fe..7e23d36 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c @@ -540,7 +540,7 @@ static int hclge_config_ppp_hw_err_int(struct hclge_dev *hdev, bool en) return ret; } -int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en) +static int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en) { struct device *dev = &hdev->pdev->dev; struct hclge_desc desc; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h index 856374c..405739b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h @@ -59,6 +59,5 @@ struct hclge_hw_error { }; int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state); -int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en); pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev); #endif diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 5cea95c..431d92a 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -7269,7 +7269,7 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) ret = hclge_hw_error_set_state(hdev, true); if (ret) { dev_err(&pdev->dev, - "hw error interrupts enable failed, ret =%d\n", ret); + "fail(%d) to enable hw error interrupts\n", ret); goto err_mdiobus_unreg; } @@ -7405,11 +7405,15 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev) return ret; } - /* Re-enable the TM hw error interrupts because - * they get disabled on core/global reset. + /* Re-enable the hw error interrupts because + * the interrupts get disabled on core/global reset. */ - if (hclge_config_tm_hw_err_int(hdev, true)) - dev_err(&pdev->dev, "failed to enable TM hw error interrupts\n"); + ret = hclge_hw_error_set_state(hdev, true); + if (ret) { + dev_err(&pdev->dev, + "fail(%d) to re-enable HNS hw error interrupts\n", ret); + return ret; + } hclge_reset_vport_state(hdev);