From patchwork Thu Dec 6 23:44:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 153079 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp605ljp; Thu, 6 Dec 2018 15:44:55 -0800 (PST) X-Google-Smtp-Source: AFSGD/VGigyrWJ5onshzbjeGVnk0TbdThLrYa+8P6K2JsKoEIvkmIlvh6O2BsUDOExRbDV86JkmV X-Received: by 2002:a17:902:a9c4:: with SMTP id b4mr30243331plr.298.1544139894927; Thu, 06 Dec 2018 15:44:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544139894; cv=none; d=google.com; s=arc-20160816; b=pjiTPspptVimg8Dh+3IzfdeuDQb7RoJBJt1EbnuotenuCgVxZJdn0RY3CnrfP/Pn7R amZy4VufQnKWQhe+tm4F1Xp+ut0Pc/rY+QYMHD16KIFsQqj0ozxc3d7xZxotD7Grmn9Z oo4i7PqCrY8xUVGyVPQvtGskA2YZT4NmQ7O8ynHbW6hrlEiScoVjQw3cwGBd5CQWgdn1 6/SG8vnSZrxLDg1yeXnETM8QxLRh++5OPdE6AjOsBAQh5+qjbPEr0F034qC43OEKPzZ/ 0dJrby/SAFwgoSz4Ey33WC6cEFaEIhKB3SVezVQL/DY598ymPoCTjMEdvZEtntLhzCTU 4FZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=kb3AQjv3t4ahcohsmM0I9eABoqQ3zeHfZmb/s6UQZas=; b=WlDI07/jogOdlzH2zlAEZP5wC8uKEBfSorjbU5TDUTOOuzGgUxZX1tChptuK+u4LtT ntwktnTuGx2DLnvqPNYLvSF74nBc0Yw/meHJF6B/Fs0j0ZsKiYmkoCYZrx3APnebLbG5 EuuFpCyqykTj1+HwIq/rGn6c1nVY5Dn4OM/s62eyzGw28iJ9NK4x0vXADUjNGF8a0z6f u+LEAtPj5Ad01Wx2xhQMgmckX7VaAtgCcVyx31hGA7W4OYCi5SOMrvsoGsg0FOiTqlFl pgGqyzQNP/LGL8OiSq8jqmkEen0YYa7L4bnlVgMm9T1fy7regcRjh+Tdlp2feUAa1XpJ /U/Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w7si1480254pfw.200.2018.12.06.15.44.54; Thu, 06 Dec 2018 15:44:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726478AbeLFXow (ORCPT + 31 others); Thu, 6 Dec 2018 18:44:52 -0500 Received: from foss.arm.com ([217.140.101.70]:35938 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726236AbeLFXog (ORCPT ); Thu, 6 Dec 2018 18:44:36 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AAB03168F; Thu, 6 Dec 2018 15:44:35 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2970A3F5AF; Thu, 6 Dec 2018 15:44:35 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, ykaukab@suse.de, Jeremy Linton Subject: [PATCH 5/6] arm64: add sysfs vulnerability show for speculative store bypass Date: Thu, 6 Dec 2018 17:44:07 -0600 Message-Id: <20181206234408.1287689-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181206234408.1287689-1-jeremy.linton@arm.com> References: <20181206234408.1287689-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mian Yousaf Kaukab Return status based no ssbd_state and the arm64 SSBS feature. Return string "Unknown" in case CONFIG_ARM64_SSBD is disabled or arch workaround2 is not available in the firmware. Signed-off-by: Mian Yousaf Kaukab [Added SSBS logic] Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpu_errata.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) -- 2.17.2 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 6505c93d507e..8aeb5ca38db8 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -423,6 +423,7 @@ static bool has_ssbd_mitigation(const struct arm64_cpu_capabilities *entry, ssbd_state = ARM64_SSBD_UNKNOWN; return false; + /* machines with mixed mitigation requirements must not return this */ case SMCCC_RET_NOT_REQUIRED: pr_info_once("%s mitigation not required\n", entry->desc); ssbd_state = ARM64_SSBD_MITIGATED; @@ -828,4 +829,31 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, } } +ssize_t cpu_show_spec_store_bypass(struct device *dev, + struct device_attribute *attr, char *buf) +{ + /* + * Two assumptions: First, get_ssbd_state() reflects the worse case + * for hetrogenous machines, and that if SSBS is supported its + * supported by all cores. + */ + switch (arm64_get_ssbd_state()) { + case ARM64_SSBD_MITIGATED: + return sprintf(buf, "Not affected\n"); + + case ARM64_SSBD_KERNEL: + case ARM64_SSBD_FORCE_ENABLE: + if (cpus_have_cap(ARM64_SSBS)) + return sprintf(buf, "Not affected\n"); + return sprintf(buf, + "Mitigation: Speculative Store Bypass disabled\n"); + + case ARM64_SSBD_FORCE_DISABLE: + return sprintf(buf, "Vulnerable\n"); + + default: /* ARM64_SSBD_UNKNOWN*/ + return sprintf(buf, "Unknown\n"); + } +} + #endif