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[209.132.180.67]) by mx.google.com with ESMTP id z21si12219019pgv.363.2018.12.03.09.17.03; Mon, 03 Dec 2018 09:17:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=mJuLSldG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727016AbeLCRRC (ORCPT + 32 others); Mon, 3 Dec 2018 12:17:02 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:33547 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726953AbeLCRRB (ORCPT ); Mon, 3 Dec 2018 12:17:01 -0500 Received: by mail-wr1-f68.google.com with SMTP id c14so13034758wrr.0 for ; Mon, 03 Dec 2018 09:16:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xe6dxR2Vde59Kua+p62/ZAkFh7k+BKyeNCE4MaXeE50=; b=mJuLSldGAO9/CbJ8V0G/bCDIcD46wesQm1LGPpzYVtxmFzHzFJHS+LEr21j97bNU94 XfqulbAt3KOVPYfKEiukw9MblLw7QlP1C3MB5/NHrsTBrYZO455Mc0ppRdZ+al3cABN9 t6BxLKZ50yhk0F4bdFWds5tbs21WP6FT2kma0nbU29CD1eB7wWasIhmLTJhrdMgt//LT qddjcUrUJHm3DTV1WnC375HcOiyJUU1Ahx37RN+cmtwwMhocILcHBo68XHJHQnBiQDA8 yWRd6MomZATRNmY1SJ3dkoGdLkn3piIL/+SqkC/nT9dV89klH8OTxmyZ0rN2Eek0wFOf hwKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xe6dxR2Vde59Kua+p62/ZAkFh7k+BKyeNCE4MaXeE50=; b=KEa6qqhCgbkiI6Z8ZkNWAj0AoGThhp+VVnp6iqEYaRbelG4FHu05f12xS4INhXV4X+ 1nlrsG0FDtcDQUu//5Wu3Xi9u0rtlTktGakc49Q0/yMCFMUq4YuEICYbycCqkjoAPcAj fpmXlzfMAfEWL8Ng8fAXyBrP4EIOThxX2iTmXOQHFLm4SX0Rd97KagzQ5wzjGNQZlS1Q 3oTqgGR9YjbW8WfatCwlXHfPgR/t4w4uys2mgn6isfTr20bAqU4y6BKDdiyarzV2JBDv yCVBAGmIjEKHW0qNmw1yECvCygoBekG2Egb9U+G76uot1/WGLcGdFIY0fHkC7KqPKEoZ OLnw== X-Gm-Message-State: AA+aEWY7S+W1MY64l5NjAYcZLryW/TacqNW9cCCr0FFkg5sdpQ69yIqc LkWeJGqMgvmJ2YiSdNAzcJJbAbloYtI= X-Received: by 2002:adf:f28d:: with SMTP id k13mr15513177wro.78.1543857417161; Mon, 03 Dec 2018 09:16:57 -0800 (PST) Received: from boomer.local ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id h203sm22494889wma.19.2018.12.03.09.16.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Dec 2018 09:16:56 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Carlo Caione , Kevin Hilman Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/3] dt-bindings: clk: meson: add ao controller clock inputs Date: Mon, 3 Dec 2018 18:16:38 +0100 Message-Id: <20181203171640.12110-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181203171640.12110-1-jbrunet@baylibre.com> References: <20181203171640.12110-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the clock inputs of amlogic AO clock controller Signed-off-by: Jerome Brunet --- Stephen, Since I made some changes here, I did not pick your previous Reviewed-by tag, in case you did not agree with this version. Cheers Jerome .../devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 2.19.1 diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt index 3a880528030e..79511d7bb321 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt @@ -11,6 +11,13 @@ Required Properties: - GXM (S912) : "amlogic,meson-gxm-aoclkc" - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc" followed by the common "amlogic,meson-gx-aoclkc" +- clocks: list of clock phandle, one for each entry clock-names. +- clock-names: should contain the following: + * "xtal" : the platform xtal + * "mpeg-clk" : the main clock controller mother clock (aka clk81) + * "ext-32k-0" : external 32kHz reference #0 if any (optional) + * "ext-32k-1" : external 32kHz reference #1 if any (optional - gx only) + * "ext-32k-2" : external 32kHz reference #2 if any (optional - gx only) - #clock-cells: should be 1. @@ -40,8 +47,9 @@ ao_sysctrl: sys-ctrl@0 { compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; #clock-cells = <1>; #reset-cells = <1>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; + clock-names = "xtal", "mpeg-clk"; }; -}; Example: UART controller node that consumes the clock and reset generated by the clock controller: