From patchwork Mon Dec 3 13:18:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 152699 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp6801598ljp; Mon, 3 Dec 2018 05:19:06 -0800 (PST) X-Google-Smtp-Source: AFSGD/VlSE2jx8kYu426CtzbRidjtSd7I6/91oE+2r5MKUsZwbundblJ8IySHj+etm4bXk0pYTTw X-Received: by 2002:a63:f111:: with SMTP id f17mr13217273pgi.236.1543843146727; Mon, 03 Dec 2018 05:19:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543843146; cv=none; d=google.com; s=arc-20160816; b=DFKqgWdXWuOp1eTXfYRrk4iVwTd4XLtrFOmvnAZsb6HD43tvcdE8TP43/fVYcj8B5W QorxZ4YdMf5TEH6O2ghha0ZpYYECI3GzZB9mKpdg7GU651RmlgzoEXaSGbrlxbpbn1ab yYugkDgwVn8bgnLI7+2ieef5860mxtOEzU68/ZBlN3Xi1nuBRhErf64FkPITQlTX4W70 vrMuapZ/bJP57k473TY2cmGhA0kL/ci961ieHCMal9WCUHD+bPJyjUaz5yni9MS7XzBp BmV4238hJx4RQyslUBMG8aLQXkhA9U1KtKIF1YaZkvtbRQBNxN7nN8AX0uVQQRE8/ZD0 0Ujg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nPWsn16HihaqS/gJnLipzT9xenTcdp/r8TBEXkQVJFg=; b=o4l6dWBDyEUx7O4eIptdfmy8EtMJgQ4j/8e19C417G5DeAoAfrlFBGQaFOOaAqrAdJ Kpmp2bhwyrPyGXc8QO6FsbJ67200knJEDqmJeo+S3MwPgfneFwBTCu6I3t+Yu+UQPyzg 12kF4Y+ol++iOpNGzLrwI0JOft7B82zsDfkA0F4SvYHGYk3ZngMxsYW1htbAwpxMrdJD oHS9bDis4Oq9xnVqQnwpRe0vzBvSak+BxUlJcApOS45Qay0mClygXhPQxboH4OXGlMzw LW1/ehgDLS++jBKiBjFzfxyRlOuibUApBMKM1iv6qlU+h+3C2Qbci7WyzHKxCuH4ovHj bX4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="vNGt/j06"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h7si13303641pls.326.2018.12.03.05.19.06; Mon, 03 Dec 2018 05:19:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="vNGt/j06"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726095AbeLCNUE (ORCPT + 32 others); Mon, 3 Dec 2018 08:20:04 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:39819 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725861AbeLCNUD (ORCPT ); Mon, 3 Dec 2018 08:20:03 -0500 Received: by mail-wr1-f65.google.com with SMTP id t27so12140172wra.6 for ; Mon, 03 Dec 2018 05:19:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nPWsn16HihaqS/gJnLipzT9xenTcdp/r8TBEXkQVJFg=; b=vNGt/j06zioXmLqN7+O4N2/xxw43bBG4RDIvXHM2l8hwHjcgsiyfFjcgxdVmM9AbJF O6852rDf0+btUzp5XwE8v3NvXqInWQ0AfKxsEd1z/fzCpCRrnVuew/BjKbMUJd2z4tsb Lr1LDICFBuD6zyevW9g1GRkcgq+8WLXSSMptI0l9epPExeNKy0fnDDW+fRI3fCazaAm8 tYjDio8gdOZtMq8vM4i4riSDM1LA7CDZO0bsyJwTRCk3tezk3vNGWuAiYF5fLMOdXw4y oUxltE6KXRuMY+sNTkbI4OiQgWD6ImmyyAWjVawAtbljC20OVD+SPnC0B9mDLkBDnMUT m2dA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nPWsn16HihaqS/gJnLipzT9xenTcdp/r8TBEXkQVJFg=; b=XGrvdl8kCsGU4vZCQWngcWkvym5/H71KAHuOLGKWohOpiBDYVBcPui4eweBUbLQA1p SB/0ZVrEj77IWkyyhRClE12Kcvyxvaq5F5MvZ8KJpLAxklLRL4fEN8swWIx5T+eYjVf9 UrmWCf7HXfhLNgrRQhIaW+1KiipBU+PhCot7aN5VE8mKxKg5ihoCehIY6HSHds6K7re7 BiGOY1XomD+n4OK+UPjIZmlCqQ0S2xOqzuzvt7FFxF4n6maiM+VTrLkuvegA9RxNlRWS ihO8aDbNQlybLM7RRM0oGI7+KtVZEPRaQoNUuiMKJT6feXWB93/A2WkyPDGSKwC7AGX2 HvgQ== X-Gm-Message-State: AA+aEWYj/E6S/5eEYTBbwGJNoow9/Lk3Tw2K0F8D3sqiWhTwhBGbFEt9 Jn81fwJkuadrxKVtJYKcm4u4IQ== X-Received: by 2002:a5d:5208:: with SMTP id j8mr14566353wrv.188.1543843141765; Mon, 03 Dec 2018 05:19:01 -0800 (PST) Received: from boomer.local ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id n19sm6371063wmh.26.2018.12.03.05.19.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Dec 2018 05:19:01 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Carlo Caione , Kevin Hilman Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] dt-bindings: clk: meson: add ao controller clock inputs Date: Mon, 3 Dec 2018 14:18:48 +0100 Message-Id: <20181203131850.31388-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181203131850.31388-1-jbrunet@baylibre.com> References: <20181203131850.31388-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the clock inputs of amlogic AO clock controller Reviewed-by: Stephen Boyd Signed-off-by: Jerome Brunet --- .../devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.19.1 diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt index 3a880528030e..c480db8f4793 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt @@ -11,6 +11,11 @@ Required Properties: - GXM (S912) : "amlogic,meson-gxm-aoclkc" - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc" followed by the common "amlogic,meson-gx-aoclkc" +- clocks: list of clock phandle, one for each entry clock-names. +- clock-names: should contain the following: + * "xtal" : the platform xtal + * "mpeg-clk" : the main clock controller mother clock (aka clk81) + * "ext-32k" : external 32kHz reference if any (optional) - #clock-cells: should be 1. @@ -40,8 +45,9 @@ ao_sysctrl: sys-ctrl@0 { compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; #clock-cells = <1>; #reset-cells = <1>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; + clock-names = "xtal", "mpeg-clk"; }; -}; Example: UART controller node that consumes the clock and reset generated by the clock controller: