From patchwork Sun Aug 12 09:47:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 143983 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp1892444ljj; Sun, 12 Aug 2018 02:48:46 -0700 (PDT) X-Google-Smtp-Source: AA+uWPztQQoO5TR9PaUEZKm0vVND2jt7PkeCbpyGTfuOPnP6X4q7nZSY3clcRKsfUTXdhYUS6nEQ X-Received: by 2002:a17:902:2e83:: with SMTP id r3-v6mr12665768plb.80.1534067326007; Sun, 12 Aug 2018 02:48:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534067325; cv=none; d=google.com; s=arc-20160816; b=D/Evs15NfDc/+vX8HA9wIbcMiyNh9EEsc03nFFHeSJFQZjgYW1PWsx9UDilQai1DQ2 Qt7E5IgdXTUCTzWONdZyznSY+OI+SKDNwvu8t6JN5z0wtNosqByBARND4sAa4B2BrhcI HKgn/qlTnXXt6twPOs1eAI5FVy541qQQCIbypWLCtSmWN8kvvUiE6HdMo0L0AWhRJEvT PAJp8+nisYgOapP5/1G3eG+JYKC2LUhkEbwNn+R0X/YKlgK/fOYsD04uhtmhLnRqJ1Nu NquuCXkYAQGl8qpTS/6XJWi0NCAmwzbIpTytGOSIfGR0hwo4YV7TVwTv+3KrmdqznpXH IvhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=2YGrKF5QrvOY8KuFV+wJbEUvl2Qj62bWLgaG3hpPzCk=; b=v9zMbzLxRM7XfkPYmZytxrLETMFXmUMsvUpy8rZlb8tnJQY2clpcNr+AazOPd46N+p PFW16ThjP9aJsi3ee3vG2KmN1tRm3xD+ecGZEVFUZedgV3HCB96jPQ3HsAYGZVfqG2+X DpwbCy/j94Qq2W5AiNNbqL5B0LdT40W3D2DrLBTczjnlDTA1XyyMworctrjGQ3GdChuR GpWNiyfW0gMpOUljRAlRC3O/seNWt1jbbdRtgpBFALQNWklB8IQFhgKi7wzAty8myHIE BVE6JP7DZc254+GRa9JYdpw/eRN1UM8IJbYNccDo3kBXFZKE9ng9Utp+hH8IqUcAsl1H hapQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 61-v6si6299474plz.447.2018.08.12.02.48.45; Sun, 12 Aug 2018 02:48:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728078AbeHLM0J (ORCPT + 31 others); Sun, 12 Aug 2018 08:26:09 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:10657 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727990AbeHLM0J (ORCPT ); Sun, 12 Aug 2018 08:26:09 -0400 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 00D6168A60A95; Sun, 12 Aug 2018 17:48:40 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.47.93.119) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.399.0; Sun, 12 Aug 2018 17:48:33 +0800 From: Salil Mehta To: CC: , , , , , , , Jian Shen Subject: [PATCH net-next 4/9] net: hns3: Fix for phy link issue when using marvell phy driver Date: Sun, 12 Aug 2018 10:47:33 +0100 Message-ID: <20180812094738.14852-5-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180812094738.14852-1-salil.mehta@huawei.com> References: <20180812094738.14852-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.93.119] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jian Shen For marvell phy m88e1510, bit SUPPORTED_FIBRE of phydev->supported is default on. Both phy_resume() and phy_suspend() will check the SUPPORTED_FIBRE bit and write register of fibre page. Currently in hns3 driver, the SUPPORTED_FIBRE bit will be cleared after phy_connect_direct() finished. Because phy_resume() is called in phy_connect_direct(), and phy_suspend() is called when disconnect phy device, so the operation for fibre page register is not symmetrical. It will cause phy link issue when reload hns3 driver. This patch fixes it by disable the SUPPORTED_FIBRE before connecting phy. This is a temporary scheme for DTS2018050311542. I'm contacking with the FAE of marvell phy, wish to get a better way to deal with it. Signed-off-by: Jian Shen Signed-off-by: Peng Li Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.11.0 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c index 85a123d40e8b..398971a062f4 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c @@ -202,6 +202,8 @@ int hclge_mac_connect_phy(struct hclge_dev *hdev) if (!phydev) return 0; + phydev->supported &= ~SUPPORTED_FIBRE; + ret = phy_connect_direct(netdev, phydev, hclge_mac_adjust_link, PHY_INTERFACE_MODE_SGMII);