From patchwork Wed Jul 11 12:26:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 141730 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp226159ljj; Wed, 11 Jul 2018 05:27:45 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfj9ogSNLD3ViyaiEf1rEBZuCPrE9Q6pQCs1v2K0r+MGDPNouNXkUDsQ1Up/dU6EIRbexOH X-Received: by 2002:a63:fc0a:: with SMTP id j10-v6mr26343389pgi.1.1531312065089; Wed, 11 Jul 2018 05:27:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531312065; cv=none; d=google.com; s=arc-20160816; b=xgLzAvTIBA+QP56YDilZ1nHnYMYYGVWMJjrv3UkqjspPA2r4pLafcrv0tWiaqRVjH8 cOg8MDu0l2ykUI5dxkBxxa+4GFIvJPQRGqdcHNvKPOJpJb1JrFSLC0rlLfjIRQBwqAPu /mfr+RH/mvBWI34fVlSUzS83v1h+RRwWSj8xJ7RgUErYtlQTe3OUeOtigX6uKNO7/w28 H6i7tGIOsuljnlpY3zB1n8Byb8wq66G2lSWz36Ofwzn84D++WPLKAN9sJ58OV47eVUf1 RxQYrXEyMe7qyd8XU/trbh5v/VZ0im+k94u+/Y2MkyS+14Z1iXj6ymB2sNu+We+SmozC EQmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=JYYXGfNWdM/v4/h1ggYuH778XH7FKvbs0GA4anQZ+5k=; b=KXtFoLWijgpd2VIr7Ng+4azDAnpVet2ofir6qTdmavPUf538bWTecWXvDRn8tOeYYu AwdGvzKb3du+16Xu9hncJXml+O2gKp4ud39yjtwdgoadd/PhQxSVG0JK6IKLH6eMnM5r 4Qzs/i+j/qv3MyubDkx/3IkvN1F/7GwaUx33YkC2unAq5B+Pt3iSPhHNs7LdLaZIwJEo SVaQnhvECj35oxEaL37dmtgPSfid+dPaYbQYilqdC7Bq1neHmdLSgPFTLv06+sNyfdBN TO9QQfctVE0ANQd+GCdtM835XP5l7Ev06ZCV4OcRDOX+PAi+lKmL6q4n5EIu7iXvwE5i bLDQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v4-v6si20268880pfk.116.2018.07.11.05.27.44; Wed, 11 Jul 2018 05:27:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733297AbeGKMbr (ORCPT + 23 others); Wed, 11 Jul 2018 08:31:47 -0400 Received: from mout.kundenserver.de ([212.227.17.24]:35795 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733245AbeGKMbq (ORCPT ); Wed, 11 Jul 2018 08:31:46 -0400 Received: from wuerfel.lan ([46.223.138.35]) by mrelayeu.kundenserver.de (mreue105 [212.227.15.145]) with ESMTPA (Nemesis) id 0LvkQW-1g8s9M1tTY-017Wjx; Wed, 11 Jul 2018 14:27:12 +0200 From: Arnd Bergmann To: Boris Brezillon , Miquel Raynal , David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Abhishek Sahu Cc: Arnd Bergmann , Archit Taneja , Masahiro Yamada , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] nand: ranw: qcom_nand: stop using phys_to_dma() Date: Wed, 11 Jul 2018 14:26:58 +0200 Message-Id: <20180711122709.358159-1-arnd@arndb.de> X-Mailer: git-send-email 2.9.0 X-Provags-ID: V03:K1:DRtCrIgwEcOl4UrtxCWSpWoKFBivG4uXqQsT4Tx7GaY+m3uLTbW xgTZaDxg/Cu06JJZ/Q088ziFlWpYuMJhSi5sYVR3GP3GoEojx/qVQ8Pc3zR3hvuI8vZyo2N oxkCnmYR3ZAiU2tLpAGRFCTMCKK+015YocJqT9QVk8h1f0ANHbdDMEkXNVPGpt36IZX+Uxk zdMX3suWUyhsm7QlGRXaA== X-UI-Out-Filterresults: notjunk:1; V01:K0:2FqddtewKMA=:KT8mvOnDm6BgQ1toIPTPt0 j4WChLuKpgM871dFnmcz1hnDXIvvKlq/HMiHZNM+nQ8A2MqgLzdTeGforAMvZP3E7xS+qBFrC j6g+RF1TtXkqmkvmGIAVwHoDybXmr4unBNG2u9MwK+WcADk8Pw9SSaGle8wBQMEnnF2v1X+pX q2DjqAKQLC4QgcFj+6NnOeN7Aqv13FuvXM0JpbaiWsX18lHHe/oVmyr3HpzzPZrtH1MqVr6ve pEwzGyRF7/KTiZcULzVVTR81EaskmDlVEBfXItrswqbzdVOSzGmcYOk/u1SLnBgSO6chVTXnZ vi75NiyvIwr3Fa68PuNGKxT6+D6GtL4TcutqbaJmTd8+wFfsHN9hoffpkxWr7YJ2P+uVknz98 8Cf/rw0h52Lu6vwZg+045pxOM0Yh2JYTU1VglsdMN8bfH545D9EcKIobvW+T+3asMPso8ZsG1 zyqHmzplON6I1vXE4IoF21fw/uWE5CsnCEDrurqfZ6xIQmU9t1YW1XsPaaKeeGbf1WZl3Jl2D VIw1V7cF+QszA3CtSN+6vRLki+lYQAYkAHjF68NN/aeogtIEjE0dwhWIkB0XLiwzGZ+yuWUee HB9COaWSJjyrvS4TM3jjpZpap41+yOQsoWBQy4d9gIB1WeISmDiux5qPDzD2nac5tVO/1pbfW 64FzhSVGg1NXri1p7ni2gQ5BuRfroCmzFT1dSPIDI+R7VUXlSAl/8mk7O3oukUoghdg4= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Compile-testing this driver on x86 caused a link error: ERROR: "__phys_to_dma" [drivers/mtd/nand/raw/qcom_nandc.ko] undefined! The problem here is that the driver attempts to convert the physical address into the DMA controller as a dma_addr_t and calls phys_to_dma() to do the conversion. However, there is no generic way to convert a phys_addr_t into a dma_addr_t for anything other than RAM (which should use the dma-mapping API instead). The only correct use of phys_to_dma() instead is inside of the dma-mapping implementation. In all other drivers that deal with DMA FIFO addresses, we just pass the physical address directly and have the DMA controller deal with that if necessary, so let's do the same thing here. Fixes: c76b78d8ec05 ("mtd: nand: Qualcomm NAND controller driver") Signed-off-by: Arnd Bergmann --- drivers/mtd/nand/raw/qcom_nandc.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) -- 2.9.0 diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index 994f980c6d86..f047e2819041 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -338,7 +338,6 @@ struct nandc_regs { * @dev: parent device * @base: MMIO base * @base_phys: physical base address of controller registers - * @base_dma: dma base address of controller registers * @core_clk: controller clock * @aon_clk: another controller clock * @@ -372,7 +371,6 @@ struct qcom_nand_controller { void __iomem *base; phys_addr_t base_phys; - dma_addr_t base_dma; struct clk *core_clk; struct clk *aon_clk; @@ -935,11 +933,11 @@ static int prep_adm_dma_desc(struct qcom_nand_controller *nandc, bool read, slave_conf.device_fc = flow_control; if (read) { slave_conf.src_maxburst = 16; - slave_conf.src_addr = nandc->base_dma + reg_off; + slave_conf.src_addr = (dma_addr_t)nandc->base_phys + reg_off; slave_conf.slave_id = nandc->data_crci; } else { slave_conf.dst_maxburst = 16; - slave_conf.dst_addr = nandc->base_dma + reg_off; + slave_conf.dst_addr = (dma_addr_t)nandc->base_phys + reg_off; slave_conf.slave_id = nandc->cmd_crci; } @@ -2963,7 +2961,6 @@ static int qcom_nandc_probe(struct platform_device *pdev) return PTR_ERR(nandc->base); nandc->base_phys = res->start; - nandc->base_dma = phys_to_dma(dev, (phys_addr_t)res->start); nandc->core_clk = devm_clk_get(dev, "core"); if (IS_ERR(nandc->core_clk))