From patchwork Fri Jul 6 10:28:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 141286 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2945102ljj; Fri, 6 Jul 2018 03:29:32 -0700 (PDT) X-Google-Smtp-Source: AAOMgpd+8ymJslwde5nq1NCnJexYUQtINbJCw0lV0Zh8NvVj3DofrVrpT7XK++2mA8/MJaL7MDiF X-Received: by 2002:aa7:8591:: with SMTP id w17-v6mr10121260pfn.77.1530872972558; Fri, 06 Jul 2018 03:29:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530872972; cv=none; d=google.com; s=arc-20160816; b=ZK/ufCr3HKvqV4Bx+JTUdG2S7u67sLInVXGD4wHCvRYrEe/G7g0xVg1nO8O7WrqhQL tKAYOdOGiKYvHmXryXWXXzZCrXAsQuiGj2jn/wAPuxCO1DZU1a1SI7iG7vTfMQiu76J8 WPuqQVAh6zkDB9S71FDr4GUb2nYzqWI4zzcXRHGpSzkIlorW2FgM/NImEk51fP4g0SyZ ihl5SgZb8w6njmvng85B+W3ZSAnyh8P6Ejhwv0nHJoyFiUZFQmytG/YMuAosqSrjC3Xl Ce1iX7H3K899B+nLxRL4XLYB85bEFnAjphMadWa7uQqm1UOPmDqaBjVmEEdcKPACeFa3 r4fg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=4yNqWYAa1QeTuF+SZAviKfKDwNW3O9Dtcbdoxyu3+YA=; b=YP8sjTQguv75Ksv/mX41Lq6KtVx26xtpeRfc6irmm0NKCTjdiIrL+Rdu+i/7naounS RsvPeQLa6eRvnCqljNUQlGsMuzF0lEVIFnpLtvc4Bmq/ptVwLnmgQECh81uIuhchVPeb CZfAbCPxdAgFROy3NBqYXvKEjd5jvshY8JMG1zKVGWkm0VaGTo0CyrDrYjJP5btRguEQ htHjkXLer45/dkUuoU8Y75KHzlJbdCdFjgR1dhANZC1Z529BnRSZAk1c/HAJv/whlH+m N+2+5qsEh+cI8ARUm0EMjVcofJeDiOFN0fpkkqBoSaWROqAKWFpdpTt7EW+ZgOgIJ0o7 Tsgg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y23-v6si7793590pgk.427.2018.07.06.03.29.32; Fri, 06 Jul 2018 03:29:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932810AbeGFK3a (ORCPT + 30 others); Fri, 6 Jul 2018 06:29:30 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:36163 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S932614AbeGFK3Z (ORCPT ); Fri, 6 Jul 2018 06:29:25 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 2EF3CCAD09844; Fri, 6 Jul 2018 18:29:21 +0800 (CST) Received: from S00293818-DELL1.huawei.com (10.202.226.54) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.382.0; Fri, 6 Jul 2018 18:29:15 +0800 From: Salil Mehta To: CC: , , , , , , , Huazhong Tan Subject: [PATCH net-next 10/10] net: hns3: Prevent sending command during global or core reset Date: Fri, 6 Jul 2018 11:28:04 +0100 Message-ID: <20180706102804.196-11-salil.mehta@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180706102804.196-1-salil.mehta@huawei.com> References: <20180706102804.196-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.54] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Huazhong Tan According to hardware's description, driver should not send command to IMP while hardware doing global or core reset. Signed-off-by: Huazhong Tan Signed-off-by: Peng Li Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c | 4 +++- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 ++ drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 1 + 3 files changed, 6 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c index 82cf12a..eca4b23 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c @@ -206,7 +206,8 @@ int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num) spin_lock_bh(&hw->cmq.csq.lock); - if (num > hclge_ring_space(&hw->cmq.csq)) { + if (num > hclge_ring_space(&hw->cmq.csq) || + test_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state)) { spin_unlock_bh(&hw->cmq.csq.lock); return -EBUSY; } @@ -346,6 +347,7 @@ int hclge_cmd_init(struct hclge_dev *hdev) spin_lock_init(&hdev->hw.cmq.crq.lock); hclge_cmd_init_regs(&hdev->hw); + clear_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state); ret = hclge_cmd_query_firmware_version(&hdev->hw, &version); if (ret) { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 4ca3e6b..8bbf4e5 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -2507,12 +2507,14 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) /* check for vector0 reset event sources */ if (BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) & rst_src_reg) { + set_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state); set_bit(HNAE3_GLOBAL_RESET, &hdev->reset_pending); *clearval = BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B); return HCLGE_VECTOR0_EVENT_RST; } if (BIT(HCLGE_VECTOR0_CORERESET_INT_B) & rst_src_reg) { + set_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state); set_bit(HNAE3_CORE_RESET, &hdev->reset_pending); *clearval = BIT(HCLGE_VECTOR0_CORERESET_INT_B); return HCLGE_VECTOR0_EVENT_RST; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 71d38b8..20abe82 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -128,6 +128,7 @@ enum HCLGE_DEV_STATE { HCLGE_STATE_MBX_SERVICE_SCHED, HCLGE_STATE_MBX_HANDLING, HCLGE_STATE_STATISTICS_UPDATING, + HCLGE_STATE_CMD_DISABLE, HCLGE_STATE_MAX };