From patchwork Tue Jun 26 16:26:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 140079 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp5595355lji; Tue, 26 Jun 2018 11:54:37 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfQxNSHxMm+nxC1a9UGpt76LgnkseweJpXJfTmbwirybU9OgrwotMoJd4lIGf56QOk8Hwvi X-Received: by 2002:a62:5788:: with SMTP id i8-v6mr2663552pfj.175.1530039277670; Tue, 26 Jun 2018 11:54:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530039277; cv=none; d=google.com; s=arc-20160816; b=drq9nSr3ANUs5783v6qijnWfjh1glygy3Y+a2otEiSyHk+g+Kn2JyOvaFvzpDbB+SY kKRPPlYDhUfBNcW3XJUAyxqI+DkjdiLSRrplyNxc1QSSYOK2x5M/1V8KUVM9aK3LcmRC KUL6PibLyYMNr0MFxiWVyxhtbJbspcGMvPosepC+EvpdWjD6++SRHWt85Q58S8inkEuy ep2p/AGUl28ton5fDcxX1/eez9iikAT6E+K7C3WdacML2K6p7WnpUe8tMho8ukPsfhtR Bw8woOkUBJ4JSa00gX1BNLXDIG8/ATbQrZUrlVD3QSqXMNofdIA0+pkNtmdj0HkBa11U Oj1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=ivgj/ShoJmSe2wkPNwq+niZmcLiFIELMlGR6C7NoKP4=; b=d7KSA17f7xZM/u8GmPwM7Tijo8oehH8q4/qU0tsbddhmCVJyTuV/lvnhOyj1DsZ9fy mhHk0fLNr/GIRHpID67v6cVqAEoGOhFUSN0lqvcVwgv7JecnDL75VZWsILnVUuHUfpKT DAaa+bChtpywRDRNKY1iCGJmuyZOkaL7oJ8CEO3HhcvCU+h8Y5t5bugxWVxYCYEc2nCW x+pQ5BQAOoZxOcGo3dUsevHIpHj/Orv+ug1UUpt4RY5SB4GQiuNe32L7M48Q3bmZjWKW Vp0JmgwZDeE2atBu5e4N+ZLEXNwCciM15Fsg4cDzYTVBEb4qyk9V7XMMhwS5Vy+m2ja0 NvrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=CjY+DnSQ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e67-v6si2113376pfa.217.2018.06.26.11.54.37; Tue, 26 Jun 2018 11:54:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=CjY+DnSQ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934244AbeFZSyg (ORCPT + 31 others); Tue, 26 Jun 2018 14:54:36 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:50382 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933897AbeFZSyX (ORCPT ); Tue, 26 Jun 2018 14:54:23 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id w5QGQFDA099183; Tue, 26 Jun 2018 11:26:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1530030375; bh=ivgj/ShoJmSe2wkPNwq+niZmcLiFIELMlGR6C7NoKP4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=CjY+DnSQCffnBwKB9ad7fcKOWigqILK37Tj82ijHQfmWUCV/YiLFnJCtl76x5gRVO tUgctdCdiovqto6500bntD8PljDkKdCUNk0D+eWVLGiM1KqV6pxQk9igyCO3KMBmzM 3XYTpAdssax7tB3tLtOBdlE/jNgLYbs9ui1RZYSY= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5QGQFOh004615; Tue, 26 Jun 2018 11:26:15 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 26 Jun 2018 11:26:15 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 26 Jun 2018 11:26:15 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5QGQF39001851; Tue, 26 Jun 2018 11:26:15 -0500 From: Nishanth Menon To: Will Deacon , Catalin Marinas , Mark Rutland , Rob Herring CC: Tony Lindgren , Russell King , Santosh Shilimkar , , , , Nishanth Menon , Tero Kristo , Sekhar Nori , Olof Johansson , Arnd Bergmann , Sudeep Holla Subject: [PATCH V2 1/5] dt-bindings: arm: ti: Add bindings for AM654 SoC Date: Tue, 26 Jun 2018 11:26:11 -0500 Message-ID: <20180626162615.19194-2-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180626162615.19194-1-nm@ti.com> References: <20180626162615.19194-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AM654 SoC is a lead device of the K3 Multicore SoC architecture platform, targeted for broad market and industrial control with aim to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Quad ARMv8 A53 cores split over two clusters * GICv3 compliant GIC500 * Configurable L3 Cache and IO-coherent architecture * Dual lock-step capable R5F uC for safety-critical applications * High data throughput capable distributed DMA architecture under NAVSS * Three Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL * Centralized System Controller for Security, Power, and Resource management. * Dual ADCSS, eQEP/eCAP, eHRPWM, dual CAN-FD * Flash subsystem with OSPI and Hyperbus interfaces * Multimedia capability with CAL, DSS7-UL, SGX544, McASP * Peripheral connectivity including USB3, PCIE, MMC/SD, GPMC, I2C, SPI, GPIO See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Reviewed-by: Tony Lindgren Signed-off-by: Nishanth Menon --- Changes since V1: * Picked up Tony's reviewed-by V1: https://patchwork.kernel.org/patch/10475327/ previous RFC: https://patchwork.kernel.org/patch/10447643/ Documentation/devicetree/bindings/arm/ti/k3.txt | 23 +++++++++++++++++++++++ MAINTAINERS | 7 +++++++ 2 files changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/ti/k3.txt -- 2.15.1 diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt new file mode 100644 index 000000000000..6a059cabb2da --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/k3.txt @@ -0,0 +1,23 @@ +Texas Instruments K3 Multicore SoC architecture device tree bindings +-------------------------------------------------------------------- + +Platforms based on Texas Instruments K3 Multicore SoC architecture +shall follow the following scheme: + +SoCs +---- + +Each device tree root node must specify which exact SoC in K3 Multicore SoC +architecture it uses, using one of the following compatible values: + +- AM654 + compatible = "ti,am654"; + +Boards +------ + +In addition, each device tree root node must specify which one or more +of the following board-specific compatible values: + +- AM654 EVM + compatible = "ti,am654-evm", "ti,am654"; diff --git a/MAINTAINERS b/MAINTAINERS index 9d5eeff51b5f..fbd93eee41ae 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2087,6 +2087,13 @@ L: linux-kernel@vger.kernel.org S: Maintained F: drivers/memory/*emif* +ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE +M: Tero Kristo +M: Nishanth Menon +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Supported +F: Documentation/devicetree/bindings/arm/ti/k3.txt + ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE M: Santosh Shilimkar L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)