From patchwork Thu Jun 21 12:13:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 139542 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp1995044lji; Thu, 21 Jun 2018 05:16:55 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLbVVOJLuNF/19JqIi0qaRvdX08Q23+7egL4vVSw7K92xDIxbAiUtI+p/ISQehVBNSG556U X-Received: by 2002:aa7:81d3:: with SMTP id c19-v6mr27331974pfn.224.1529583415119; Thu, 21 Jun 2018 05:16:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529583415; cv=none; d=google.com; s=arc-20160816; b=KQiqPHARHmNyuZQuE0Z0NOKliXOvI3/6E9CtVv5XMUyQy0XnHXe7iZ4v6hn2tvPMpY J3UzV3Qi8VpI/Kb3VRylAyk6AP2++ZMzvVd6Z7Xk+hALJmeliuo0xkxtXR+sAQS8pfn7 SvTvRWALouG3uO0/zaGOHTccsSW9BHYJMRq/52K4JjD3ojfEy4mcb/WgFZQDoQi+LpBi rHyMuLVRLYsRVb+QZQJ9q6rg2oHY87akAfzEsFijYPbZCicoVCAsIXJhCqittrj/1ynq pM4auJs0l6TYs0R7Q97RctFVEz5Pdq45BqfZPTbB9x5GC7B/A0SyxjfFx7IUYpw+oeEs c0cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=p+dbCQ+OQxWkJCKhe3F9PFr6qFKqTQSVuKPqG2bj9Rw=; b=zxhHyiIOTgvewa900wTEOii0Zd5Fq2H1aoHSq+TAED3a11YsnMH5zyNLsQPgMWZIGW z8sCvvhsCuieM+vX8mJ7IAh1BBjaTteLRoK7wZXnkfHWRrA31dpk1jn9Q4y17ry7wJ7q 7g66OAFbiiHfx3nFdC2fyHmUkNyYZh/SCK43QKpq6rPacWlzyc9xM5nW+EmG2yNRHCFF eIrWAtJIiFgDm6UuIkav3ArW5dTO9DgPd40WffKE5kwwr3PtU90Yz1VO0KI1U2KyClM9 CHOdIxDm7UzYrFz50FkxbGfMtUFp+5BBvjYCa1b9jw86s9teMDdQusi8L2B6IBlgEH8o lhRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e11-v6si5291113pln.161.2018.06.21.05.16.54; Thu, 21 Jun 2018 05:16:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933645AbeFUMQx (ORCPT + 30 others); Thu, 21 Jun 2018 08:16:53 -0400 Received: from foss.arm.com ([217.140.101.70]:49278 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933522AbeFUMNk (ORCPT ); Thu, 21 Jun 2018 08:13:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D9F7D15BF; Thu, 21 Jun 2018 05:13:39 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 85D6D3F578; Thu, 21 Jun 2018 05:13:38 -0700 (PDT) From: Mark Rutland To: mingo@kernel.org, will.deacon@arm.com, peterz@infradead.org, linux-kernel@vger.kernel.org Cc: Mark Rutland , Michael Ellerman , Boqun Feng Subject: [PATCHv4 04/18] atomics: make conditional ops return bool Date: Thu, 21 Jun 2018 13:13:07 +0100 Message-Id: <20180621121321.4761-5-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180621121321.4761-1-mark.rutland@arm.com> References: <20180621121321.4761-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some of the atomics return a status value, which is a boolean value describing whether the operation was performed. To make it clear that this is a boolean value, let's update the common fallbacks to return bool, fixing up the return values and comments likewise. At the same time, let's simplify the description of the operations in their respective comments. The instrumented atomics and generic atomic64 implementation are updated accordingly. Note that atomic64_dec_if_positive() doesn't follow the usual test op pattern, and returns the would-be decremented value. This is not changed. Signed-off-by: Mark Rutland Acked-by: Peter Zijlstra (Intel) Reviewed-by: Will Deacon Cc: Michael Ellerman Cc: Boqun Feng --- include/asm-generic/atomic-instrumented.h | 2 +- include/asm-generic/atomic64.h | 3 ++- include/linux/atomic.h | 24 +++++++++++++----------- lib/atomic64.c | 6 +++--- 4 files changed, 19 insertions(+), 16 deletions(-) -- 2.11.0 diff --git a/include/asm-generic/atomic-instrumented.h b/include/asm-generic/atomic-instrumented.h index b8b14cc2df6c..497faa4a05e3 100644 --- a/include/asm-generic/atomic-instrumented.h +++ b/include/asm-generic/atomic-instrumented.h @@ -205,7 +205,7 @@ static __always_inline s64 atomic64_dec_return(atomic64_t *v) return arch_atomic64_dec_return(v); } -static __always_inline s64 atomic64_inc_not_zero(atomic64_t *v) +static __always_inline bool atomic64_inc_not_zero(atomic64_t *v) { kasan_check_write(v, sizeof(*v)); return arch_atomic64_inc_not_zero(v); diff --git a/include/asm-generic/atomic64.h b/include/asm-generic/atomic64.h index 8d28eb010d0d..a951a721e1bb 100644 --- a/include/asm-generic/atomic64.h +++ b/include/asm-generic/atomic64.h @@ -11,6 +11,7 @@ */ #ifndef _ASM_GENERIC_ATOMIC64_H #define _ASM_GENERIC_ATOMIC64_H +#include typedef struct { long long counter; @@ -52,7 +53,7 @@ ATOMIC64_OPS(xor) extern long long atomic64_dec_if_positive(atomic64_t *v); extern long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n); extern long long atomic64_xchg(atomic64_t *v, long long new); -extern int atomic64_add_unless(atomic64_t *v, long long a, long long u); +extern bool atomic64_add_unless(atomic64_t *v, long long a, long long u); #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) #define atomic64_inc(v) atomic64_add(1LL, (v)) diff --git a/include/linux/atomic.h b/include/linux/atomic.h index 5c5620ae5a35..307a7f6d619a 100644 --- a/include/linux/atomic.h +++ b/include/linux/atomic.h @@ -2,6 +2,8 @@ /* Atomic operations usable in machine independent code */ #ifndef _LINUX_ATOMIC_H #define _LINUX_ATOMIC_H +#include + #include #include @@ -525,10 +527,10 @@ * @a: the amount to add to v... * @u: ...unless v is equal to u. * - * Atomically adds @a to @v, so long as @v was not already @u. - * Returns non-zero if @v was not @u, and zero otherwise. + * Atomically adds @a to @v, if @v was not already @u. + * Returns true if the addition was done. */ -static inline int atomic_add_unless(atomic_t *v, int a, int u) +static inline bool atomic_add_unless(atomic_t *v, int a, int u) { return atomic_fetch_add_unless(v, a, u) != u; } @@ -537,8 +539,8 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) * atomic_inc_not_zero - increment unless the number is zero * @v: pointer of type atomic_t * - * Atomically increments @v by 1, so long as @v is non-zero. - * Returns non-zero if @v was non-zero, and zero otherwise. + * Atomically increments @v by 1, if @v is non-zero. + * Returns true if the increment was done. */ #ifndef atomic_inc_not_zero #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) @@ -572,28 +574,28 @@ static inline int atomic_fetch_andnot_release(int i, atomic_t *v) #endif #ifndef atomic_inc_unless_negative -static inline int atomic_inc_unless_negative(atomic_t *p) +static inline bool atomic_inc_unless_negative(atomic_t *p) { int v, v1; for (v = 0; v >= 0; v = v1) { v1 = atomic_cmpxchg(p, v, v + 1); if (likely(v1 == v)) - return 1; + return true; } - return 0; + return false; } #endif #ifndef atomic_dec_unless_positive -static inline int atomic_dec_unless_positive(atomic_t *p) +static inline bool atomic_dec_unless_positive(atomic_t *p) { int v, v1; for (v = 0; v <= 0; v = v1) { v1 = atomic_cmpxchg(p, v, v - 1); if (likely(v1 == v)) - return 1; + return true; } - return 0; + return false; } #endif diff --git a/lib/atomic64.c b/lib/atomic64.c index 53c2d5edc826..4230f4b8906c 100644 --- a/lib/atomic64.c +++ b/lib/atomic64.c @@ -178,16 +178,16 @@ long long atomic64_xchg(atomic64_t *v, long long new) } EXPORT_SYMBOL(atomic64_xchg); -int atomic64_add_unless(atomic64_t *v, long long a, long long u) +bool atomic64_add_unless(atomic64_t *v, long long a, long long u) { unsigned long flags; raw_spinlock_t *lock = lock_addr(v); - int ret = 0; + bool ret = false; raw_spin_lock_irqsave(lock, flags); if (v->counter != u) { v->counter += a; - ret = 1; + ret = true; } raw_spin_unlock_irqrestore(lock, flags); return ret;