From patchwork Thu Jun 21 12:13:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 139543 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp1995317lji; Thu, 21 Jun 2018 05:17:12 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIufmvJex2NJybLP3r/EkPJFEl1HAFxksQcINHHEEVxyhPws9yKaeLfzCRBHUR1a0OAH44Y X-Received: by 2002:a63:9a01:: with SMTP id o1-v6mr22217250pge.439.1529583431958; Thu, 21 Jun 2018 05:17:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529583431; cv=none; d=google.com; s=arc-20160816; b=CSSm/oN+25jQDyT6SUUVq+xuxvR7JuEfLwwDPsMei0RfAMzm/dWK2H6UWoES3/LITc GfPYqzJ06Td5HwVg9RUQ8evvF+l9zftWmztYBTJJ2ydHSrWlm0w5UnceENjkoAcFSWrt aqTnUNLeXeQM7rUdABIWSezyON2n9ThQLwOGf/r2KDi7ugYF//lvgLf7KWRHoD2U46sX JsJyzdEW6sP1XeOKcWgT+yTE+t5OwEpow1RVRIAneC+TgxbpInyBV5TR+nIfgqUWRntT AP6yPg2QSqVVThujiNo8YDwuODziES5frOw9mUCXxrasvNFc1NzrHgJSZrzD/L3H6Tac V6gw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=gFFMkV2qMeHao48+OxK1BUOOa1ulOAT/02Ztg5Pb3FQ=; b=nTjx0pw5hMtZYiiehye4S6Qgyn3opzrhdtaTTQwJQlNuvZCQY3v4Yd8pcYnw56KH5P Am0w13HAG+v/5Ib+FFZuTWsRCjD9L6VTXbFw18wQsVM9lzPHVG0oW911JE70taFhcjaB sRN09rHZVkT2Wme5NcFTQa23ijpEjr6Vz4jmiSDYX5RBqJEf6hfAbFCXVG808idjO1wC vzdqcURn4mvqxuer4jhIsMCG6DWaWqj5ctlgLf2vxHcE36goKYzfmJLXuWGNz7+nyrwF IemZila3rL5zokUP9VcNPlTx47TU/GAm8ZZPaAyzz0TyHNrWDfuEFTc7ts2bKVKE4s5F 4sKQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e11-v6si5291113pln.161.2018.06.21.05.17.11; Thu, 21 Jun 2018 05:17:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933677AbeFUMRK (ORCPT + 30 others); Thu, 21 Jun 2018 08:17:10 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:49256 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933451AbeFUMNg (ORCPT ); Thu, 21 Jun 2018 08:13:36 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CD2C015AD; Thu, 21 Jun 2018 05:13:35 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9C58D3F578; Thu, 21 Jun 2018 05:13:34 -0700 (PDT) From: Mark Rutland To: mingo@kernel.org, will.deacon@arm.com, peterz@infradead.org, linux-kernel@vger.kernel.org Cc: Mark Rutland , Boqun Feng Subject: [PATCHv4 02/18] atomics/treewide: remove redundant atomic_inc_not_zero() definitions Date: Thu, 21 Jun 2018 13:13:05 +0100 Message-Id: <20180621121321.4761-3-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180621121321.4761-1-mark.rutland@arm.com> References: <20180621121321.4761-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When atomic_inc_not_zero(v) isn't defined, will define it as falling back to atomic_add_unless((v), 1, 0), so there's no need for arch code to do so. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland Acked-by: Peter Zijlstra (Intel) Acked-by: Palmer Dabbelt Reviewed-by: Will Deacon Cc: Boqun Feng --- arch/arc/include/asm/atomic.h | 2 -- arch/hexagon/include/asm/atomic.h | 2 -- arch/riscv/include/asm/atomic.h | 9 --------- 3 files changed, 13 deletions(-) -- 2.11.0 diff --git a/arch/arc/include/asm/atomic.h b/arch/arc/include/asm/atomic.h index 67121b5ff3a3..cecdf3403caf 100644 --- a/arch/arc/include/asm/atomic.h +++ b/arch/arc/include/asm/atomic.h @@ -336,8 +336,6 @@ ATOMIC_OPS(xor, ^=, CTOP_INST_AXOR_DI_R2_R2_R3) c; \ }) -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - #define atomic_inc(v) atomic_add(1, v) #define atomic_dec(v) atomic_sub(1, v) diff --git a/arch/hexagon/include/asm/atomic.h b/arch/hexagon/include/asm/atomic.h index 287aa9f394f3..d2feeba93c44 100644 --- a/arch/hexagon/include/asm/atomic.h +++ b/arch/hexagon/include/asm/atomic.h @@ -197,8 +197,6 @@ static inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) return __oldval; } -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - #define atomic_inc(v) atomic_add(1, (v)) #define atomic_dec(v) atomic_sub(1, (v)) diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h index 739e810c857e..0e27e050ba14 100644 --- a/arch/riscv/include/asm/atomic.h +++ b/arch/riscv/include/asm/atomic.h @@ -375,15 +375,6 @@ static __always_inline int atomic64_add_unless(atomic64_t *v, long a, long u) } #endif -/* - * The extra atomic operations that are constructed from one of the core - * LR/SC-based operations above. - */ -static __always_inline int atomic_inc_not_zero(atomic_t *v) -{ - return atomic_fetch_add_unless(v, 1, 0); -} - #ifndef CONFIG_GENERIC_ATOMIC64 static __always_inline long atomic64_inc_not_zero(atomic64_t *v) {