From patchwork Thu Jun 21 12:13:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 139540 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp1993702lji; Thu, 21 Jun 2018 05:15:42 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJ7C6357P8Ie9W7qZoVStJNnUlX1gbyysdS2YBQDR7PT6wYxmdXSF3WuD/p/gw/Hz06JGVD X-Received: by 2002:a63:8b44:: with SMTP id j65-v6mr22952920pge.203.1529583342077; Thu, 21 Jun 2018 05:15:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529583342; cv=none; d=google.com; s=arc-20160816; b=y5BiU2iISS8Ymjwg9U6Bu2HmdDzWRYrF9PB99IO37UERnMNdnSOwsQYpgQFcc3/9zO jAVDyj7cEnudCwm2wG80yDSKOMd7iQ/0XQsNke5jbzhdfU62wbLECBjxFdgHAk95hLwF VUU4297b0tVmmDO0P54RtolJAk5lRQFUwp7y5YqlHKl0em3Ni5LovI7upds4Sg1xAtbz 6aKJFaM3Wkv0JY385zFhVOUoCMJ+5zmvWfyyc/KAWo5H3V0u4bqT27c6SKOg70kmL+WR DYiYynvhGYkoIBiQctV6krj+bNODZKl3IUKTc9jFlLt07Ry+OnBZRRdIr4x9F0Vr15Kq nJeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=pyXakkPJmUYHRNUSTlcClcQPjGfQnW9vPHro726kA8s=; b=x8PFidY57kizkSy8WCwoDuluVBpr/UcTplnL3rllYN1/BfMtNP8xcmEK2LHArwR2H1 Y1C7QBk71ekL/A7/+U6HlQi0KRN+to77P3/NLZhq7BoelHgd3V+o9k2O6pGh6NCQ0M6y 9k+1UYHMScAYJ4sPEwmBesjki2NeLUs8o0MtiZ3qBnbV7VawFXPcnyIlysJ6vgARYr11 ABwhOYV5m1gFXfKplVbA9w2Ha0hll2KY7CabAVtoOQOosqGsdmCoOsyfPhYydsrbyOft dulYe/iXu3kekGue59JQ8hSitV1KK94gcDkSjaKF8Iy86JK7ApnclQ4kF4f+Y9qJ71yn Z3Jg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e1-v6si4568081pld.80.2018.06.21.05.15.41; Thu, 21 Jun 2018 05:15:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933381AbeFUMPj (ORCPT + 30 others); Thu, 21 Jun 2018 08:15:39 -0400 Received: from foss.arm.com ([217.140.101.70]:49384 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933399AbeFUMN4 (ORCPT ); Thu, 21 Jun 2018 08:13:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EC93815BF; Thu, 21 Jun 2018 05:13:55 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9878E3F578; Thu, 21 Jun 2018 05:13:54 -0700 (PDT) From: Mark Rutland To: mingo@kernel.org, will.deacon@arm.com, peterz@infradead.org, linux-kernel@vger.kernel.org Cc: Mark Rutland , Boqun Feng , Russell King Subject: [PATCHv4 11/18] atomics/arm: define atomic64_fetch_add_unless() Date: Thu, 21 Jun 2018 13:13:14 +0100 Message-Id: <20180621121321.4761-12-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180621121321.4761-1-mark.rutland@arm.com> References: <20180621121321.4761-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As a step towards unifying the atomic/atomic64/atomic_long APIs, this patch converts the arch/arm implementation of atomic64_add_unless() into an implementation of atomic64_fetch_add_unless(). A wrapper in will build atomic_add_unless() atop of this, provided it is given a preprocessor definition. No functional change is intended as a result of this patch. Signed-off-by: Mark Rutland Acked-by: Peter Zijlstra (Intel) Reviewed-by: Will Deacon Cc: Boqun Feng Cc: Russell King --- arch/arm/include/asm/atomic.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.11.0 diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h index 74460aa00fa0..852e1fee72b0 100644 --- a/arch/arm/include/asm/atomic.h +++ b/arch/arm/include/asm/atomic.h @@ -486,11 +486,11 @@ static inline long long atomic64_dec_if_positive(atomic64_t *v) return result; } -static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) +static inline long long atomic64_fetch_add_unless(atomic64_t *v, long long a, + long long u) { - long long val; + long long oldval, newval; unsigned long tmp; - int ret = 1; smp_mb(); prefetchw(&v->counter); @@ -499,23 +499,23 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) "1: ldrexd %0, %H0, [%4]\n" " teq %0, %5\n" " teqeq %H0, %H5\n" -" moveq %1, #0\n" " beq 2f\n" -" adds %Q0, %Q0, %Q6\n" -" adc %R0, %R0, %R6\n" -" strexd %2, %0, %H0, [%4]\n" +" adds %Q1, %Q0, %Q6\n" +" adc %R1, %R0, %R6\n" +" strexd %2, %1, %H1, [%4]\n" " teq %2, #0\n" " bne 1b\n" "2:" - : "=&r" (val), "+r" (ret), "=&r" (tmp), "+Qo" (v->counter) + : "=&r" (oldval), "=&r" (newval), "=&r" (tmp), "+Qo" (v->counter) : "r" (&v->counter), "r" (u), "r" (a) : "cc"); - if (ret) + if (oldval != u) smp_mb(); - return ret; + return oldval; } +#define atomic64_fetch_add_unless atomic64_fetch_add_unless #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) #define atomic64_inc(v) atomic64_add(1LL, (v))