From patchwork Tue Jun 5 06:16:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137688 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp564943lji; Mon, 4 Jun 2018 23:17:56 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLQp5mCZY+d+T2tpFVRvpmu8qAlznzGnQZAxtceSTLeC0EE6M3pLv8gNEwMNEOc9hA8OUs3 X-Received: by 2002:a17:902:a9:: with SMTP id a38-v6mr11539509pla.102.1528179476249; Mon, 04 Jun 2018 23:17:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528179476; cv=none; d=google.com; s=arc-20160816; b=mvEqpp5v+zpLtHT6ztTk/v08AY6KJT+g7K9srhrvy6tci7NJMloCRV342SMEQhZFUq +WepqXC/5IvCktRkMJNC3S+ldb94B32tfq4ZA/DF/0tErq+MLksrOmIMH0W6P6Dtid0n F85q1IloaryIj60KW8q5kgt/qaRMY9Fg7fJBCYaDGKmJNsgG0y8xHAdiNmMLHPyLNmZJ my+QlRNYOEI1xHkc7ikH7D7N6B14LSkyJeXQujg173u5TH7TkIakIWC2lt2lz2Cac4VP us3cNZqdw515zWH+rwfLH9kuOGlHiOZn3DuhSVbaWipFUn1a5hw0IMZJaqRpKdi5jXrK vT2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=O8ZNcOMuOsPfeZITroPBICqQNP6wPrsEiJ0XOz3WzXw=; b=wu/Wbld397+4bj2p8Qm16U0OCpFUyD97TWaZS3Zm3js46/UDT4JGSlnK9wzL7o6gKj ay6lsByRwpdzZ3qJ/cZSSL1S1IcU7bw81TvvYYiyPrLjR4R1gIqRdiYr7gQ+mUUWjna7 EG0fqwc3EAJdUywXD4VISCQKcPnK/Cf/m1gzC+f7jg5YGdeejYgXTmYCup625H3UCe2n gXWw/yYT/1sEr8Ma6ffHbWR5T+PE69zAW6FLBzShlSSp6vzbxJX4lvvKG9RrdlW/xHAP wTmmPMqNVpkcni9iXpOux7kUYIEc3ZU5ja+x5ktCaMEjN0c3VyqANU09Xyl1W9P6GqEY 6ZFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aWWIJZhO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ca5-v6si13126942plb.143.2018.06.04.23.17.56; Mon, 04 Jun 2018 23:17:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aWWIJZhO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751786AbeFEGRm (ORCPT + 30 others); Tue, 5 Jun 2018 02:17:42 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:42687 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751818AbeFEGQs (ORCPT ); Tue, 5 Jun 2018 02:16:48 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w556GT8A026975; Tue, 5 Jun 2018 01:16:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528179389; bh=O8ZNcOMuOsPfeZITroPBICqQNP6wPrsEiJ0XOz3WzXw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aWWIJZhOlrD6rqp0CuAmLD2IVasnTJO9O0M7jF9/DPwhG8j7RJCiqJCKaEuiS1XNY 8Mqj8VWKf1PI+pAgSllm8YPcc7OyJuXsp8ZdxKXbV8ViJ+9dQ8AqlX5uYv7W//0imW v8n8FlWgLrilppta0GTI6lBvF+oOUwb5xZJvieLI= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTla015149; Tue, 5 Jun 2018 01:16:29 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:16:29 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:16:29 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTuM016948; Tue, 5 Jun 2018 01:16:29 -0500 From: Nishanth Menon To: Jassi Brar , Rob Herring CC: , , , Nishanth Menon , Tero Kristo , Suman Anna Subject: [RFC PATCH 5/8] dt-bindings: mailbox: ti, message-manager: Add support for secure proxy threads Date: Tue, 5 Jun 2018 01:16:26 -0500 Message-ID: <20180605061629.4759-6-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605061629.4759-1-nm@ti.com> References: <20180605061629.4759-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Secure Proxy is another communication scheme in Texas Instrument's devices intended to provide an unique communication path from various processors in the System on Chip(SoC) to a central System Controller. Secure proxy is, in effect, an evolution of current generation Message Manager hardware block found in K2G devices. However the following changes have taken place: Secure Proxy instance exposes "threads" or "proxies" which is primary representation of "a" communication channel. Each thread is preconfigured by System controller configuration based on SoC usage requirements. Secure proxy by itself represents a single "queue" of communication but allows the proxies to be independently operated. Each Secure proxy thread can uniquely have their own error and threshold interrupts allowing for more fine control of IRQ handling. Provide an hardware description of the same for device tree representation. See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Signed-off-by: Nishanth Menon --- .../bindings/mailbox/ti,message-manager.txt | 58 +++++++++++++++++++--- 1 file changed, 50 insertions(+), 8 deletions(-) -- 2.15.1 diff --git a/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt b/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt index ebf0e3710cee..de796e90cac6 100644 --- a/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt +++ b/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt @@ -7,22 +7,40 @@ manager is broken up into queues in different address regions that are called "proxies" - each instance is unidirectional and is instantiated at SoC integration level to indicate receive or transmit path. +This can also be used to describe Texas Instrument's Secure Proxy +controller that allows for individually configurable "threads" or +"proxies" which allow for independent communication scheme. + Message Manager Device Node: =========================== Required properties: -------------------- -- compatible: Shall be: "ti,k2g-message-manager" -- reg-names queue_proxy_region - Map the queue proxy region. - queue_state_debug_region - Map the queue state debug - region. +- compatible: Shall be one of: "ti,k2g-message-manager", + "ti,am654-secure-proxy" +- reg-names for ti,k2g-message-manager, the following shall exist: + queue_proxy_region - Map the queue proxy region. + queue_state_debug_region - Map the queue state + debug region. + for ti,am654-secure-proxy, the following shall exist: + target_data - Map the proxy data region + rt - Map the realtime status region + scfg - Map the configuration region - reg: Contains the register map per reg-names. -- #mbox-cells Shall be 2. Contains the queue ID and proxy ID in that - order referring to the transfer path. +- #mbox-cells for ti,k2g-message-manager, Shall be 2. Contains the + queue ID and proxy ID in the following order referring + to the transfer path: + queue_proxy_region - Map the queue proxy region. + queue_state_debug_region - Map the queue state + debug region. + for ti,am654-secure-proxy, Shall be 1 and shall refer + to the transfer path called thread. - interrupt-names: Contains interrupt names matching the rx transfer path for a given SoC. Receive interrupts shall be of the - format: "rx_". - For ti,k2g-message-manager, this shall contain: + format: + For ti,k2g-message-manager, this shall be: "rx_" + and shall contain: "rx_005", "rx_057" + for ti,am654-secure-proxy, this shall be: "rx_". - interrupts: Contains the interrupt information corresponding to interrupt-names property. @@ -48,3 +66,27 @@ Example(K2G): <&msgmgr 0 0>; [...] }; + +Example(AM654): +------------ + + secure_proxy: secure_proxy@32c00000 { + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "target_data", "rt", "scfg"; + reg = <0x0 0x32c00000 0x0 0x100000>, + <0x0 0x32400000 0x0 0x100000>, + <0x0 0x32800000 0x0 0x100000>; + interrupt-names = "rx_011"; + interrupts = ; + }; + + dmsc: dmsc { + [...] + mbox-names = "rx", "tx"; + # RX Thread ID is 11 + # TX Thread ID is 13 + mboxes= <&secure_proxy 11>, + <&secure_proxy 13>; + [...] + };