From patchwork Fri Jun 1 11:24:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 137520 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp807649lji; Fri, 1 Jun 2018 04:27:44 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIJtbFvAXA5tpgfDF4GAsmr4zPcFCqphymyJ/WIpBsHhYfiVQyIU3gpgJm62ysfjJZb/VBH X-Received: by 2002:a17:902:205:: with SMTP id 5-v6mr10540475plc.301.1527852464672; Fri, 01 Jun 2018 04:27:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527852464; cv=none; d=google.com; s=arc-20160816; b=IAmHljHUi36UukOI7W0DQlyHyi8D3IeCT68ybfg0/s9eCx8wn9itSb99Hqo/9lfvJ3 P/JXbdDJ5OeDn4nBVuJ4O/sbkDBUPlRYgbJan3f5zbdim/33g6arnmETp7qFFxMrExBU rJFcU8nXgPPcDBqqsYTxj2Lq9k7Lw4xikLXjXS/3xPa1vNUtit+4Wyuxb52oKvVliEk1 OcgocydcNn8Gmh9JXLiZoQydV+AKqhjHKs8cdrEW+aSjQRiGaAiJF1jhiuovWF0yH6UI QN1+rQsDYE5Jn6MUB02+HncvkxrcQFP5KJ5IAt23C7gHacc9DGJHfBNyzvABYwfCf+zW 0xBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=0qbh9YyYk2Fu8//V3v595cYA4CFBraDa4yvmMcEnuA0=; b=SgRDT3+SVkapmgeoMGfuDU448SbX26wv+Lpaitc/jYWqKcQLg5NudciV/sRmjCmffQ oRuF5YwrkReg9MD9j0uyXWOC3HEgJjgprSBE9PAWtftqzOTPjl0PlsLLjowNRiN04QrO 8ZGOr+1KUssRYjBQ/Ee9A6m545YHCBiexGEz9WCfBvXTcxlO1Y7XhKzTTTTgNe3N21l6 9MlGpMBk1msF9V0odPorMAemsANpqGhWXceVeZLWo1ZzLcd7meDCj2zIkX8W86RkWkaI vNBcaHDPGtodasiO1GTiH4P07xznyDfIQC1Lvu8TWMo6zBwBlihA1+BQVcGE02G1n5gl W7fw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h4-v6si678978pgs.201.2018.06.01.04.27.44; Fri, 01 Jun 2018 04:27:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752190AbeFAL1m (ORCPT + 30 others); Fri, 1 Jun 2018 07:27:42 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50344 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751807AbeFALZM (ORCPT ); Fri, 1 Jun 2018 07:25:12 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 375AB1529; Fri, 1 Jun 2018 04:25:12 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 20F203F25D; Fri, 1 Jun 2018 04:25:10 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will.deacon@arm.com, catalin.marinas@arm.com Cc: Mark Rutland Subject: [PATCHv2 12/19] arm64: zero GPRs upon entry from EL0 Date: Fri, 1 Jun 2018 12:24:34 +0100 Message-Id: <20180601112441.37810-13-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180601112441.37810-1-mark.rutland@arm.com> References: <20180601112441.37810-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We can zero GPRs x0 - x29 upon entry from EL0 to make it harder for userspace to control values consumed by speculative gadgets. We don't blat x30, since this is stashed much later, and we'll blat it before invoking C code. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/kernel/entry.S | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 22c58e7dfc0f..39440c2ee66d 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -63,6 +63,12 @@ #endif .endm + .macro clear_gp_regs + .irp n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29 + mov x\n, xzr + .endr + .endm + /* * Bad Abort numbers *----------------- @@ -179,6 +185,7 @@ skip_apply_ssbd\@: stp x28, x29, [sp, #16 * 14] .if \el == 0 + clear_gp_regs mrs x21, sp_el0 ldr_this_cpu tsk, __entry_task, x20 // Ensure MDSCR_EL1.SS is clear, ldr x19, [tsk, #TSK_TI_FLAGS] // since we can unmask debug @@ -186,7 +193,6 @@ skip_apply_ssbd\@: apply_ssbd 1, x22, x23 - mov x29, xzr // fp pointed to user-space .else add x21, sp, #S_FRAME_SIZE get_thread_info tsk